Only generate a dtb and bus devices if dtb_enabled #1244
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jerryz123
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scottj97
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I don't have time to investigate right now, but b19eb27 changes the way my custom tests (proprietary, sorry) run the reset sequence. The log diff:
core 0: 0x0000000000001008 (0xf1402573) csrr a0, mhartid
core 0: 3 0x0000000000001008 (0xf1402573) x10 0x0000000000000000
core 0: 0x000000000000100c (0x0182b283) ld t0, 24(t0)
-core 0: 3 0x000000000000100c (0x0182b283) x5 0x0000000080002000 mem 0x0000000000001018
+core 0: 3 0x000000000000100c (0x0182b283) x5 0x0000000080000000 mem 0x0000000000001018
core 0: 0x0000000000001010 (0x00028067) jr t0
core 0: 3 0x0000000000001010 (0x00028067)
So the memory value at 0x1018 is different, which changes the destination of the jr. I believe this code is coming from Spike's built-in reset vector.
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I think I see the issue. I'll update this in a moment. |
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I've removed the offending commit from this PR. |
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Before 3b26740, the reset was necessary because sim_t::get_dts would be called before sim_t::make_dtb was called in reset(). This is no longer necessary since now `make_dtb` is called in the constructor of sim_t
This makes proc_t respect cfg->pmpregions even if no dtb parsing is performed
The DTS-based configuration already switched the default to sv57, This just changes the processor_t constructor to match
!dtb_enabled will now result in the following behavior: * sim_t.dts and sim_t.dtb will be empty * the dtb_file passed to sim_t will be ignored * The default bootrom will not be instantiated * Bus devices normally configured by parsing the dtb will not be added This includes the CLINT/PLIC/UART
scottj97
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Feb 7, 2023
aswaterman
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Feb 7, 2023
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Previously, spike would generate a dts/dtb even if
!dtb_enabled, and add devices based on what was generated. This breaks the use case where a spike-as-library user wants to both:!dtb_enablednow skips both dts/dtb generation and adding the default PLIC/CLINT/UART devices.