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[Auto-gen] Update bfloat16 documents under ../auto-generated. (make g…
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28 changes: 20 additions & 8 deletions
28
auto-generated/bfloat16/policy_funcs/llvm-api-tests/vmerge.c
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Original file line number | Diff line number | Diff line change |
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@@ -1,32 +1,44 @@ | ||
// REQUIRES: riscv-registered-target | ||
// RUN: %clang_cc1 -triple riscv64 -target-feature +v \ | ||
// RUN: -target-feature +experimental-zvfbfmin \ | ||
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \ | ||
// RUN: -target-feature +zvfbfmin \ | ||
// RUN: -target-feature +zvfbfwma -disable-O0-optnone \ | ||
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \ | ||
// RUN: FileCheck --check-prefix=CHECK-RV64 %s | ||
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#include <riscv_vector.h> | ||
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vbfloat16mf4_t test_vmerge_vvm_bf16mf4_tu(vbfloat16mf4_t vd, vbfloat16mf4_t vs2, vbfloat16mf4_t vs1, vbool64_t v0, size_t vl) { | ||
vbfloat16mf4_t test_vmerge_vvm_bf16mf4_tu(vbfloat16mf4_t vd, vbfloat16mf4_t vs2, | ||
vbfloat16mf4_t vs1, vbool64_t v0, | ||
size_t vl) { | ||
return __riscv_vmerge_vvm_bf16mf4_tu(vd, vs2, vs1, v0, vl); | ||
} | ||
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vbfloat16mf2_t test_vmerge_vvm_bf16mf2_tu(vbfloat16mf2_t vd, vbfloat16mf2_t vs2, vbfloat16mf2_t vs1, vbool32_t v0, size_t vl) { | ||
vbfloat16mf2_t test_vmerge_vvm_bf16mf2_tu(vbfloat16mf2_t vd, vbfloat16mf2_t vs2, | ||
vbfloat16mf2_t vs1, vbool32_t v0, | ||
size_t vl) { | ||
return __riscv_vmerge_vvm_bf16mf2_tu(vd, vs2, vs1, v0, vl); | ||
} | ||
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vbfloat16m1_t test_vmerge_vvm_bf16m1_tu(vbfloat16m1_t vd, vbfloat16m1_t vs2, vbfloat16m1_t vs1, vbool16_t v0, size_t vl) { | ||
vbfloat16m1_t test_vmerge_vvm_bf16m1_tu(vbfloat16m1_t vd, vbfloat16m1_t vs2, | ||
vbfloat16m1_t vs1, vbool16_t v0, | ||
size_t vl) { | ||
return __riscv_vmerge_vvm_bf16m1_tu(vd, vs2, vs1, v0, vl); | ||
} | ||
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vbfloat16m2_t test_vmerge_vvm_bf16m2_tu(vbfloat16m2_t vd, vbfloat16m2_t vs2, vbfloat16m2_t vs1, vbool8_t v0, size_t vl) { | ||
vbfloat16m2_t test_vmerge_vvm_bf16m2_tu(vbfloat16m2_t vd, vbfloat16m2_t vs2, | ||
vbfloat16m2_t vs1, vbool8_t v0, | ||
size_t vl) { | ||
return __riscv_vmerge_vvm_bf16m2_tu(vd, vs2, vs1, v0, vl); | ||
} | ||
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vbfloat16m4_t test_vmerge_vvm_bf16m4_tu(vbfloat16m4_t vd, vbfloat16m4_t vs2, vbfloat16m4_t vs1, vbool4_t v0, size_t vl) { | ||
vbfloat16m4_t test_vmerge_vvm_bf16m4_tu(vbfloat16m4_t vd, vbfloat16m4_t vs2, | ||
vbfloat16m4_t vs1, vbool4_t v0, | ||
size_t vl) { | ||
return __riscv_vmerge_vvm_bf16m4_tu(vd, vs2, vs1, v0, vl); | ||
} | ||
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vbfloat16m8_t test_vmerge_vvm_bf16m8_tu(vbfloat16m8_t vd, vbfloat16m8_t vs2, vbfloat16m8_t vs1, vbool2_t v0, size_t vl) { | ||
vbfloat16m8_t test_vmerge_vvm_bf16m8_tu(vbfloat16m8_t vd, vbfloat16m8_t vs2, | ||
vbfloat16m8_t vs1, vbool2_t v0, | ||
size_t vl) { | ||
return __riscv_vmerge_vvm_bf16m8_tu(vd, vs2, vs1, v0, vl); | ||
} |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -1,32 +1,38 @@ | ||
// REQUIRES: riscv-registered-target | ||
// RUN: %clang_cc1 -triple riscv64 -target-feature +v \ | ||
// RUN: -target-feature +experimental-zvfbfmin \ | ||
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \ | ||
// RUN: -target-feature +zvfbfmin \ | ||
// RUN: -target-feature +zvfbfwma -disable-O0-optnone \ | ||
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \ | ||
// RUN: FileCheck --check-prefix=CHECK-RV64 %s | ||
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#include <riscv_vector.h> | ||
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vbfloat16mf4_t test_vmv_v_v_bf16mf4_tu(vbfloat16mf4_t vd, vbfloat16mf4_t vs1, size_t vl) { | ||
vbfloat16mf4_t test_vmv_v_v_bf16mf4_tu(vbfloat16mf4_t vd, vbfloat16mf4_t vs1, | ||
size_t vl) { | ||
return __riscv_vmv_v_v_bf16mf4_tu(vd, vs1, vl); | ||
} | ||
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vbfloat16mf2_t test_vmv_v_v_bf16mf2_tu(vbfloat16mf2_t vd, vbfloat16mf2_t vs1, size_t vl) { | ||
vbfloat16mf2_t test_vmv_v_v_bf16mf2_tu(vbfloat16mf2_t vd, vbfloat16mf2_t vs1, | ||
size_t vl) { | ||
return __riscv_vmv_v_v_bf16mf2_tu(vd, vs1, vl); | ||
} | ||
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vbfloat16m1_t test_vmv_v_v_bf16m1_tu(vbfloat16m1_t vd, vbfloat16m1_t vs1, size_t vl) { | ||
vbfloat16m1_t test_vmv_v_v_bf16m1_tu(vbfloat16m1_t vd, vbfloat16m1_t vs1, | ||
size_t vl) { | ||
return __riscv_vmv_v_v_bf16m1_tu(vd, vs1, vl); | ||
} | ||
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vbfloat16m2_t test_vmv_v_v_bf16m2_tu(vbfloat16m2_t vd, vbfloat16m2_t vs1, size_t vl) { | ||
vbfloat16m2_t test_vmv_v_v_bf16m2_tu(vbfloat16m2_t vd, vbfloat16m2_t vs1, | ||
size_t vl) { | ||
return __riscv_vmv_v_v_bf16m2_tu(vd, vs1, vl); | ||
} | ||
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vbfloat16m4_t test_vmv_v_v_bf16m4_tu(vbfloat16m4_t vd, vbfloat16m4_t vs1, size_t vl) { | ||
vbfloat16m4_t test_vmv_v_v_bf16m4_tu(vbfloat16m4_t vd, vbfloat16m4_t vs1, | ||
size_t vl) { | ||
return __riscv_vmv_v_v_bf16m4_tu(vd, vs1, vl); | ||
} | ||
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vbfloat16m8_t test_vmv_v_v_bf16m8_tu(vbfloat16m8_t vd, vbfloat16m8_t vs1, size_t vl) { | ||
vbfloat16m8_t test_vmv_v_v_bf16m8_tu(vbfloat16m8_t vd, vbfloat16m8_t vs1, | ||
size_t vl) { | ||
return __riscv_vmv_v_v_bf16m8_tu(vd, vs1, vl); | ||
} |
4 changes: 2 additions & 2 deletions
4
auto-generated/bfloat16/policy_funcs/llvm-overloaded-tests/vfmv.c
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4 changes: 2 additions & 2 deletions
4
auto-generated/bfloat16/policy_funcs/llvm-overloaded-tests/vmerge.c
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4 changes: 2 additions & 2 deletions
4
auto-generated/bfloat16/policy_funcs/llvm-overloaded-tests/vmv.c
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