Minor revision

- Reorder rule.
- Pass struct as tuple-type in register only when vector arg reg is
  enough, otherwise passed in reference.
- Add NOTE for describe what if ABI_VLEN is smaller than VLEN, also
  come with an example.
- Add NOTE for describe different functions may use different
  ABI_VLEN values.

riscv-cc.adoc

@@ -482,22 +482,25 @@ A fixed-length vector argument is passed in eight vector argument registers,
 similar to vector data arguments with LMUL=8, if the size of the vector is
 greater than 4×ABI_VLEN bit and less than or equal to 8×ABI_VLEN bit.
 
+A fixed-length vector argument is passed by reference and is replaced in the
+argument list with the address if it is larger than 8×ABI_VLEN bit or if
+there is a shortage of vector argument registers.
+
 A struct containing members with all fixed-length vectors will be passed in
 vector argument registers like a vector tuple type if all members have the
 same length, the length is less or equal to 8×ABI_VLEN bit, and the size of
-the whole struct is less than 8×ABI_VLEN bit. Otherwise, it will use the rule
-defined in the hardware floating-point calling convention.
+the whole struct is less than 8×ABI_VLEN bit.
+If there are not enough vector argument registers to pass the entire struct,
+it will pass by reference and is replaced in the argument list with the address.
+Otherwise, it will use the rule defined in the hardware floating-point calling
+convention.
 
 A struct containing just one fixed-length vector array is passed as though it
 were a vector tuple type if the size of the base element for the array is less
 or equal to 8×ABI_VLEN bit, and the size of the array is less than 8×ABI_VLEN
 bit. Otherwise, it will use the rule defined in the hardware floating-point
 calling convention.
 
-A fixed-length vector argument is passed by reference and is replaced in the
-argument list with the address if it is larger than 8×ABI_VLEN bit or if
-there is a shortage of vector argument registers.
-
 Unions with fixed-length vectors are always passed according to the integer
 calling convention.
 
@@ -508,6 +511,36 @@ NOTE: Functions that use the standard fixed-length vector calling convention
 variant must be marked with STO_RISCV_VARIANT_CC. See <<Dynamic Linking>>
 for the meaning of STO_RISCV_VARIANT_CC.
 
+[NOTE]
+====
+When ABI_VLEN is smaller than the VLEN, the number of vector argument
+registers utilized remains unchanged. However, in such cases, values are only
+placed in a portion of these vector argument registers, corresponding to the
+size of ABI_VLEN. The remaining portion of the vector argument registers, which
+extends beyond the ABI_VLEN, will remain idle. This means that while the full
+capacity of the vector argument registers may not be used, the allocation of
+these registers do not change, ensuring consistency in register usage regardless
+of the ABI_VLEN to VLEN ratio.
+
+Example: With ABI_VLEN at 32 bits and VLEN at 128 bits, consider passing an
+`int32x4_t` parameter (four 32-bit integers).
+
+Allocation: Four vector argument registers are allocated for
+`int32x4_t`, based on LMUL=4.
+
+Utilization: All four integers are placed in the first vector register,
+utilizing its full 128-bit capacity (VLEN), despite ABI_VLEN being 32 bits.
+
+Remaining Registers: The other three allocated registers remain unused and idle.
+====
+
+NOTE: In a single compilation unit, different functions may use different
+ABI_VLEN values. This means that ABI_VLEN is not uniform across the entire unit,
+allowing for function-specific optimization. However, this necessitates that
+users ensure consistency in ABI_VLEN between calling and called functions. It
+is the user's responsibility to verify that the ABI_VLEN matches on both sides
+of a function call to ensure correct operation and data handling.
+
 === ILP32E Calling Convention
 
 IMPORTANT: RV32E is not a ratified base ISA and so we cannot guarantee the