[question] How to run ACT on a real board

[trdthg]

I want to run ACT tests on a real riscv board, is there a way?

I found this comment riscv-non-isa/riscv-arch-test-reports#2 (comment). They seem to be using gdb, openocd, JTAG, and the gdb plugin to achieve the thing I want.
The repository for the plugin seems to be this: https://gitlab.com/incoresemi/riscof-plugins/-/tree/master/gdb, but it looks quite old. Should I continue use this?

BTW, I have never used openocd or jtag before, and it seems that I also need to do some welding to access the JTAG above. https://wiki.sipeed.com/hardware/en/lichee/th1520/lpi4a/6_peripheral.html#JTAG

[allenjbaum]

I dimly recall that someone did run the ACTs on either real silicon, or an FPGA very early on, but don't know the details. I don't know if the riscof plugin works, but it does depend on whether the speced external debug is supported by your board. Note that ACTs were designed to only require 3 basic functions for the DUT: load tests into memory, start a test, halt a test, and read the signature from memory. Those 4 functions are invoked by riscof, but defined by the DUT in terms of macros (e.g. RVMODEL_HALT) and the plugin (which will use linker scripts and RVMODEL_* parameters defined as macros) RVMODEL_HALT is often defined as a write to a specific MMIO location which a simulator is monitoring, but could also be a break instruction (though that's tricky if you're running a break instruction test....)

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On Thu, Nov 14, 2024 at 1:00 AM MingZhu Yan ***@***.***> wrote: I want to run ACT tests on a real riscv board, is there a way? I found this comment riscv-non-isa/riscv-arch-test-reports#2 (comment) <riscv-non-isa/riscv-arch-test-reports#2 (comment)>. They seem to be using gdb, openocd, JTAG, and the gdb plugin to achieve the thing I want. The repository for the plugin seems to be this: https://gitlab.com/incoresemi/riscof-plugins/-/tree/master/gdb, but it looks quite outdated. Should I continue use this? I have never used openocd or jtag before, and it seems that I also need to do some welding to access the JTAG above. https://wiki.sipeed.com/hardware/en/lichee/th1520/lpi4a/6_peripheral.html#JTAG — Reply to this email directly, view it on GitHub <#561>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/AHPXVJRVX6QI3CPMJJ5W5W32ARRDHAVCNFSM6AAAAABRYL64BWVHI2DSMVQWIX3LMV43ASLTON2WKOZSGY2TQMJQGQ4TMNQ> . You are receiving this because you are subscribed to this thread.Message ID: ***@***.***>