Merge branch 'dev' into pte_perm_func

coverage/cgfs_fext/RV32Zcd/fld.cgf

@@ -0,0 +1,67 @@
+c.fld:
+    config: 
+      - check ISA:=regex(.*I.*F.*D.*C.*)
+    mnemonics: 
+      c.fld: 0
+    rs1: 
+      <<: *c_regs
+    rd: 
+      <<: *c_fregs
+    op_comb: 
+        'rs1 != rd': 0
+    val_comb:
+        'imm_val > 0  and fcsr == 0': 0
+        'imm_val == 0 and fcsr == 0': 0
+        abstract_comb:
+          'walking_ones("imm_val",5,False, scale_func = lambda x: x*8)': 0
+          'walking_zeros("imm_val",5,False, scale_func = lambda x: x*8)': 0
+          'alternate("imm_val",5, False,scale_func = lambda x: x*8)': 0
+
+c.fsd:
+    config: 
+      - check ISA:=regex(.*I.*F.*D.*C.*)
+    opcode: 
+      c.fsd: 0
+    rs1: 
+      <<: *c_regs
+    rs2: 
+      <<: *c_fregs
+    op_comb: 
+        'rs1 != rs2': 0
+    val_comb:
+        'imm_val > 0': 0
+        'imm_val == 0': 0
+        abstract_comb:
+          'walking_ones("imm_val",5,False, scale_func = lambda x: x*8)': 0
+          'walking_zeros("imm_val",5,False, scale_func = lambda x: x*8)': 0
+          'alternate("imm_val",5, False,scale_func = lambda x: x*8)': 0
+
+c.fldsp:
+    config: 
+      - check ISA:=regex(.*I.*F.*D.*C.*)
+    opcode: 
+      c.fldsp: 0
+    rd: 
+      <<: *all_fregs
+    val_comb:
+        'imm_val > 0': 0
+        'imm_val == 0': 0
+        abstract_comb:
+          'walking_ones("imm_val",6,False, scale_func = lambda x: x*8)': 0
+          'walking_zeros("imm_val",6,False, scale_func = lambda x: x*8)': 0
+          'alternate("imm_val",6, False,scale_func = lambda x: x*8)': 0
+
+c.fsdsp:
+    config: 
+      - check ISA:=regex(.*I.*F.*D.*C.*)
+    opcode: 
+      c.fsdsp: 0
+    rs2: 
+      <<: *all_fregs
+    val_comb:
+        'imm_val > 0': 0
+        'imm_val == 0': 0
+        abstract_comb:
+          'walking_ones("imm_val",6,False, scale_func = lambda x: x*8)': 0
+          'walking_zeros("imm_val",6,False, scale_func = lambda x: x*8)': 0
+          'alternate("imm_val",6, False,scale_func = lambda x: x*8)': 0

coverage/cgfs_fext/RV32Zcf/flw.cgf

@@ -0,0 +1,65 @@
+c.flw:
+    config: 
+      - check ISA:=regex(.*I.*F.*C.*)
+    mnemonics: 
+      c.flw: 0
+    rs1: 
+      <<: *c_regs
+    rd: 
+      <<: *c_fregs
+    val_comb:
+        'imm_val > 0  and fcsr == 0': 0
+        'imm_val == 0 and fcsr == 0': 0
+        abstract_comb:
+          'walking_ones("imm_val",5,False, scale_func = lambda x: x*4)': 0
+          'walking_zeros("imm_val",5,False, scale_func = lambda x: x*4)': 0
+          'alternate("imm_val",5, False,scale_func = lambda x: x*4)': 0
+
+c.flwsp:
+    config: 
+      - check ISA:=regex(.*I.*F.*C.*)
+    opcode: 
+      c.flwsp: 0
+    rd: 
+      <<: *c_fregs
+    val_comb:
+        'imm_val > 0  and fcsr == 0': 0
+        'imm_val == 0 and fcsr == 0': 0
+        abstract_comb:
+          'walking_ones("imm_val",6,False, scale_func = lambda x: x*4)': 0
+          'walking_zeros("imm_val",6,False, scale_func = lambda x: x*4)': 0
+          'alternate("imm_val",6, False,scale_func = lambda x: x*4)': 0
+
+c.fsw:
+    config: 
+      - check ISA:=regex(.*I.*F.*C.*)
+    opcode: 
+      c.fsw: 0
+    rs1: 
+      <<: *c_regs
+    rs2: 
+      <<: *c_fregs
+    op_comb: 
+        'rs1 != rs2': 0
+    val_comb:
+        'imm_val > 0': 0
+        'imm_val == 0': 0
+        abstract_comb:
+          'walking_ones("imm_val",5,False, scale_func = lambda x: x*4)': 0
+          'walking_zeros("imm_val",5,False, scale_func = lambda x: x*4)': 0
+          'alternate("imm_val",5, False,scale_func = lambda x: x*4)': 0
+
+c.fswsp:
+    config: 
+      - check ISA:=regex(.*I.*F.*C.*)
+    opcode: 
+      c.fswsp: 0
+    rs2: 
+      <<: *c_fregs
+    val_comb:
+        'imm_val > 0': 0
+        'imm_val == 0': 0
+        abstract_comb:
+          'walking_ones("imm_val",6,False, scale_func = lambda x: x*4)': 0
+          'walking_zeros("imm_val",6,False, scale_func = lambda x: x*4)': 0
+          'alternate("imm_val",6, False,scale_func = lambda x: x*4)': 0

coverage/cgfs_fext/RV64Zcd/fld.cgf

@@ -0,0 +1,67 @@
+c.fld:
+    config: 
+      - check ISA:=regex(.*I.*F.*D.*C.*)
+    mnemonics: 
+      c.fld: 0
+    rs1: 
+      <<: *c_regs
+    rd: 
+      <<: *c_fregs
+    op_comb: 
+        'rs1 != rd': 0
+    val_comb:
+        'imm_val > 0  and fcsr == 0': 0
+        'imm_val == 0 and fcsr == 0': 0
+        abstract_comb:
+          'walking_ones("imm_val",5,False, scale_func = lambda x: x*8)': 0
+          'walking_zeros("imm_val",5,False, scale_func = lambda x: x*8)': 0
+          'alternate("imm_val",5, False,scale_func = lambda x: x*8)': 0
+
+c.fsd:
+    config: 
+      - check ISA:=regex(.*I.*F.*D.*C.*)
+    opcode: 
+      c.fsd: 0
+    rs1: 
+      <<: *c_regs
+    rs2: 
+      <<: *c_fregs
+    op_comb: 
+        'rs1 != rs2': 0
+    val_comb:
+        'imm_val > 0': 0
+        'imm_val == 0': 0
+        abstract_comb:
+          'walking_ones("imm_val",5,False, scale_func = lambda x: x*8)': 0
+          'walking_zeros("imm_val",5,False, scale_func = lambda x: x*8)': 0
+          'alternate("imm_val",5, False,scale_func = lambda x: x*8)': 0
+
+c.fldsp:
+    config: 
+      - check ISA:=regex(.*I.*F.*D.*C.*)
+    opcode: 
+      c.fldsp: 0
+    rd: 
+      <<: *all_fregs
+    val_comb:
+        'imm_val > 0': 0
+        'imm_val == 0': 0
+        abstract_comb:
+          'walking_ones("imm_val",6,False, scale_func = lambda x: x*8)': 0
+          'walking_zeros("imm_val",6,False, scale_func = lambda x: x*8)': 0
+          'alternate("imm_val",6, False,scale_func = lambda x: x*8)': 0
+
+c.fsdsp:
+    config: 
+      - check ISA:=regex(.*I.*F.*D.*C.*)
+    opcode: 
+      c.fsdsp: 0
+    rs2: 
+      <<: *all_fregs
+    val_comb:
+        'imm_val > 0': 0
+        'imm_val == 0': 0
+        abstract_comb:
+          'walking_ones("imm_val",6,False, scale_func = lambda x: x*8)': 0
+          'walking_zeros("imm_val",6,False, scale_func = lambda x: x*8)': 0
+          'alternate("imm_val",6, False,scale_func = lambda x: x*8)': 0

coverage/dataset.cgf

@@ -180,6 +180,16 @@ datasets:
     x13: 0
     x14: 0
     x15: 0
+
+  c_fregs: &c_fregs
+    f8: 0
+    f9: 0
+    f10: 0
+    f11: 0
+    f12: 0
+    f13: 0
+    f14: 0
+    f15: 0
 
   all_regs_mx2: &all_regs_mx2
     x1: 0

requirements.txt

@@ -17,6 +17,7 @@ Jinja2
 m2r2>=0.2.7
 MarkupSafe>=1.1.1
 mistune>=0.8.4
+ordered-set>=4.1.0
 oyaml>=0.9
 packaging>=19.0
 pbr>=5.3.1
@@ -26,7 +27,7 @@ Pygments>=2.4.2
 pyparsing>=2.4.0
 pytablewriter
 pytest
-python-constraint
+python-constraint>=1.4.0
 python-dateutil>=2.8.0
 pytz>=2019.1
 pyyaml

riscv-ctg/riscv_ctg/constants.py

@@ -3,6 +3,8 @@
 import os
 from math import *
 from string import Template
+
+from ordered_set import OrderedSet
 from riscv_isac.fp_dataset import *
 
 root = os.path.abspath(os.path.dirname(__file__))
@@ -120,7 +122,7 @@ def gen_sign_dataset(bit_width):
     t1 =( '' if bit_width%2 == 0 else '1') + ''.join(['01']*int(bit_width/2))
     t2 =( '' if bit_width%2 == 0 else '0') + ''.join(['10']*int(bit_width/2))
     data += [twos(t1,bit_width),twos(t2,bit_width)]
-    return list(set(data))
+    return list(OrderedSet(data))
 
 def gen_usign_dataset(bit_width):
     '''

riscv-ctg/riscv_ctg/cross_comb.py

@@ -122,7 +122,7 @@ def cross_comb(self, cgf_node):
         full_solution = []
 
         if 'cross_comb' in cgf_node:
-            cross_comb = set(cgf_node['cross_comb'])
+            cross_comb = OrderedSet(cgf_node['cross_comb'])
         else:
             return
 
@@ -210,7 +210,7 @@ def eval_conds(*oprs_lst):
                         opr_lst += get_oprs(assgn)
 
                         # Remove redundant operands
-                        opr_lst = list(set(opr_lst))
+                        opr_lst = list(OrderedSet(opr_lst))
 
                         # Get possible instructions
                         problem.reset()
@@ -293,7 +293,7 @@ def exc_rd_zero(*oprs_lst):
                     opr_lst = get_oprs(cond)
                     opr_lst += get_oprs(assgn)
 
-                    opr_lst = list(set(opr_lst))                  
+                    opr_lst = list(OrderedSet(opr_lst))                  
 
                     if data[i] in self.OP_TEMPLATE:                                    # If single instruction
                         instr = data[i]
@@ -363,7 +363,7 @@ def exc_rd_zero(*oprs_lst):
 
             full_solution += [solution]
 
-        self.isa = list(set(isa_set))
+        self.isa = list(OrderedSet(isa_set))
         return full_solution
 
     def swreg(cross_comb_instrs):
@@ -381,10 +381,10 @@ def swreg(cross_comb_instrs):
                 if key != 'instr' and key != 'imm_val':
                     op_vals.add(val)
 
-        swreg_sol = set(['x'+str(x) for x in range(0,32 if 'e' not in base_isa else 16)]) - op_vals
+        swreg_sol = OrderedSet(['x'+str(x) for x in range(0,32 if 'e' not in base_isa else 16)]) - op_vals
 
         sreg = random.choice(list(swreg_sol))
-        freg_Sol = swreg_sol - set(sreg)
+        freg_Sol = swreg_sol - OrderedSet(sreg)
         freg = random.choice(list(freg_Sol))
         return (sreg, freg)
 
@@ -401,7 +401,7 @@ def get_reginit_str(cross_comb_instrs, freg):
             - List of initialization strings
         '''
 
-        reg_init_lst = set()
+        reg_init_lst = OrderedSet()
 
         for instr_dict in cross_comb_instrs:
             if 'rd' in instr_dict:
@@ -455,7 +455,7 @@ def write_test(self, fprefix, cgf_node, usage_str, cov_label, full_solution):
             sig_label = "signature_" + sreg + "_" + str(sreg_dict[sreg])
             code = code + "\nRVTEST_SIGBASE(" + sreg + ", "+ sig_label + ")\n\n"
 
-            rd_lst = set()
+            rd_lst = OrderedSet()
             # Generate instruction corresponding to each instruction dictionary
             # Append signature update statements to store rd value after each instruction
             code += '// Cross-combination test sequence\n'

riscv-ctg/riscv_ctg/csr_comb.py

@@ -267,7 +267,7 @@ def __init__(self, base_isa, xlen, randomize):
     def csr_comb(self, cgf_node):
         logger.debug('Generating tests for csr_comb')
         if 'csr_comb' in cgf_node:
-            csr_comb = set(cgf_node['csr_comb'])
+            csr_comb = OrderedSet(cgf_node['csr_comb'])
         else:
             return
 

riscv-ctg/riscv_ctg/ctg.py

@@ -100,7 +100,7 @@ def gen_test(op_node, opcode):
         logger.info('Writing tests for csr_comb')
         csr_comb_gen.write_test(fprefix, node, usage_str, label, csr_comb_instr_dict)
 
-def ctg(verbose, out, random ,xlen_arg,flen_arg, cgf_file,num_procs,base_isa, max_inst,inxFlag):
+def ctg(verbose, out, random ,xlen_arg,flen_arg, cgf_file,num_procs,base_isa, max_inst,inxFlag,filter):
     logger.level(verbose)
     logger.info('****** RISC-V Compliance Test Generator {0} *******'.format(__version__ ))
     logger.info('Copyright (c) 2020, InCore Semiconductors Pvt. Ltd.')
@@ -134,6 +134,12 @@ def ctg(verbose, out, random ,xlen_arg,flen_arg, cgf_file,num_procs,base_isa, ma
     op_template = utils.load_yaml(const.template_files)
     cgf = expand_cgf(cgf_file,xlen,flen)
     pool = mp.Pool(num_procs)
-    results = pool.starmap(create_test, [(usage_str, node,label,base_isa,max_inst, op_template,
-        randomize, out_dir, xlen, flen, inxFlag) for label,node in cgf.items()])
+
+    args_list = []
+    for label,node in cgf.items():
+        if filter is not None and re.search(filter, label) is None:
+            continue
+        args_list.append((usage_str, node,label,base_isa,max_inst, op_template,
+        randomize, out_dir, xlen, flen, inxFlag))
+    results = pool.starmap(create_test, args_list)
     pool.close()