make PMP setup a common macro

riscv-non-isa · Aug 14, 2023 · e0e57ec · e0e57ec
1 parent 78db16d
commit e0e57ec
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Showing 8 changed files with 67 additions and 55 deletions.
diff --git a/coverage/rv32_svadu.cgf b/coverage/rv32_svadu.cgf
@@ -1,7 +1,7 @@
 
-svadu_sv32:
+svhad_sv32:
   config: 
-    - check ISA:=regex(.*I.*Svadu.*)
+    - check ISA:=regex(.*I.*Svhad.*)
   opcode: 
     nop: 0
 

diff --git a/coverage/rv64_svadu.cgf b/coverage/rv64_svadu.cgf
@@ -1,17 +1,17 @@
-svadu_sv39:
+svhad_sv39:
   config: 
-    - check ISA:=regex(.*I.*Svadu.*)
+    - check ISA:=regex(.*I.*Svhad.*)
   opcode: 
     nop: 0
 
-svadu_sv48:
+svhad_sv48:
   config: 
-    - check ISA:=regex(.*I.*Svadu.*)
+    - check ISA:=regex(.*I.*Svhad.*)
   opcode: 
     nop: 0
 
-svadu_sv57:
+svhad_sv57:
   config: 
-    - check ISA:=regex(.*I.*Svadu.*)
+    - check ISA:=regex(.*I.*Svhad.*)
   opcode: 
     nop: 0
diff --git a/riscv-test-suite/env/encoding.h b/riscv-test-suite/env/encoding.h
@@ -135,11 +135,11 @@
 #define MENVCFG_CBIE  0x00000030
 #define MENVCFG_CBCFE 0x00000040
 #define MENVCFG_CBZE  0x00000080
-#define MENVCFG_HADE  0x2000000000000000
+#define MENVCFG_ADUE  0x2000000000000000
 #define MENVCFG_PBMTE 0x4000000000000000
 #define MENVCFG_STCE  0x8000000000000000
 
-#define MENVCFGH_HADE  0x20000000
+#define MENVCFGH_ADUE  0x20000000
 #define MENVCFGH_PBMTE 0x40000000
 #define MENVCFGH_STCE  0x80000000
 

diff --git a/riscv-test-suite/env/test_macros.h b/riscv-test-suite/env/test_macros.h
@@ -984,7 +984,27 @@ RVTEST_SIGUPD_F(swreg,destreg,flagreg)
     sub x1,x1,tempreg			;\
     RVTEST_SIGUPD(swreg,x1,offset) 
 
-#define TEST_SVADU(swreg, PTE_ADDR, VA, offset, menvcfgaddr, hade_bit) \
+#define SETUP_PMP_SVADU_TEST(swreg, offset, TR0, TR1, TR2) \
+  li TR0, -1                                 ;\
+  csrw pmpaddr0, TR0                         ;\
+  j PMP_exist                                ;\
+  li TR0, 0                                  ;\
+  li TR1, 0                                  ;\
+  j Mend_PMP                                 ;\
+PMP_exist:                                   ;\
+  li TR1, PMP_TOR | PMP_X | PMP_W | PMP_R    ;\
+  csrw pmpcfg0, TR1                          ;\
+  csrr TR2, pmpcfg0                          ;\
+  beq TR1, TR2, Mend_PMP                     ;\
+no_TOR_try_NAPOT:                            ;\
+  li TR1, PMP_NAPOT | PMP_X | PMP_W | PMP_R  ;\
+  csrw pmpcfg0, TR1                          ;\
+  csrr TR2, pmpcfg0                          ;\
+Mend_PMP:                                    ;\
+  RVTEST_SIGUPD(x1,TR0,offset)               ;\
+  RVTEST_SIGUPD(x1,TR1,offset)               ;\
+
+#define TEST_SVADU(swreg, PTE_ADDR, VA, offset, menvcfgaddr, adue_bit) \
     sfence.vma                                                                          ;\
     la t0, VA                                                                           ;\
     li t2, PTE_X | PTE_W | PTE_R                                                        ;\
@@ -1057,7 +1077,7 @@ RVTEST_SIGUPD_F(swreg,destreg,flagreg)
     SREG t0, (PTE_ADDR)                                                                 ;\
     sfence.vma                                                                          ;\
 											;\
-    li t0, hade_bit                                                                     ;\
+    li t0, adue_bit                                                                     ;\
     csrs menvcfgaddr, t0                                                                ;\
 											;\
     la t0, VA                                                                           ;\

diff --git a/riscv-test-suite/rv32i_m/Svadu/src/svadu_sv32.S b/riscv-test-suite/rv32i_m/Svadu/src/svadu_sv32.S
@@ -19,17 +19,14 @@ RVMODEL_BOOT
 RVTEST_CODE_BEGIN
 
 #ifdef TEST_CASE_1
-  RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);check ISA:=regex(.*Svadu.*);def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",svadu_sv32)
+  RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);check ISA:=regex(.*Svadu.*);def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",svadu_sv32)
 
   RVTEST_SIGBASE(x1, signature_x1_0)
 
-  # enable pmp to cover 4 GiB address space
-  li t0, -1
-  csrw pmpaddr0, t0
-  li t0, PMP_TOR | PMP_X | PMP_W | PMP_R
-  csrw pmpcfg0, t0
+  # Setup PMP to cover 4G of address space
+  SETUP_PMP_SVADU_TEST(x1, offset, t0, t1, t2)
 
-  # ID map the page_4k
+  # Identity map the page_4k
   la t1, page_4k
   mv t2, t1
   PTE_SETUP_SV32(t1, PTE_V, t0, s2, t2, 1)
@@ -38,12 +35,11 @@ RVTEST_CODE_BEGIN
   SATP_SETUP(t0, t1, SATP32_MODE)
 
   # test svadu
-  TEST_SVADU(x1, s2, page_4k, offset, 0x31a, MENVCFGH_HADE)
-
-  RVMODEL_HALT
+  TEST_SVADU(x1, s2, page_4k, offset, 0x31a, MENVCFGH_ADUE)
 
 #endif
 RVTEST_CODE_END
+RVMODEL_HALT
 
 RVTEST_DATA_BEGIN
   .align 12
@@ -64,8 +60,10 @@ CANARY;
 signature_x1_0:
   .fill 128*(XLEN/32),4,0xdeadbeef
 
+#ifdef rvtest_mtrap_routine
 mtrap_sigptr:
   .fill 128*4, 4, 0xdeadbeef
+#endif
 
 #ifdef rvtest_gpr_save
 gpr_save:

diff --git a/riscv-test-suite/rv64i_m/Svadu/src/svadu_sv39.S b/riscv-test-suite/rv64i_m/Svadu/src/svadu_sv39.S
@@ -19,30 +19,26 @@ RVMODEL_BOOT
 RVTEST_CODE_BEGIN
 
 #ifdef TEST_CASE_1
-  RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);check ISA:=regex(.*Svadu.*);def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",svadu_sv39)
+  RVTEST_CASE(1,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);check ISA:=regex(.*Svadu.*);def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",svadu_sv39)
 
   RVTEST_SIGBASE(x1, signature_x1_0)
 
-  # enable pmp to cover 4 GiB address space
-  li t0, -1
-  csrw pmpaddr0, t0
-  li t0, PMP_TOR | PMP_X | PMP_W | PMP_R
-  csrw pmpcfg0, t0
+  # Setup PMP to cover 4G of address space
+  SETUP_PMP_SVADU_TEST(x1, offset, t0, t1, t2)
 
-  # ID map the page_4k
+  # Idenity map the page_4k
   la t1, page_4k
   mv t2, t1
   PTE_SETUP_SV39(t1, PTE_V, t0, s2, t2, 2)
 
-  # enable virtual memory in Sv32 mode
+  # enable virtual memory in Sv39 mode
   SATP_SETUP(t0, t1, ((SATP_MODE & ~(SATP_MODE<<1)) * SATP_MODE_SV39))
 
   # test svadu
-  TEST_SVADU(x1, s2, page_4k, offset, 0x30a, MENVCFG_HADE)
-
-  RVMODEL_HALT
+  TEST_SVADU(x1, s2, page_4k, offset, 0x30a, MENVCFG_ADUE)
 #endif
 RVTEST_CODE_END
+RVMODEL_HALT
 
 RVTEST_DATA_BEGIN
   .align 12
@@ -63,8 +59,10 @@ CANARY;
 signature_x1_0:
   .fill 64*(XLEN/32),4,0xdeadbeef
 
+#ifdef rvtest_mtrap_routine
 mtrap_sigptr:
   .fill 128*4, 4, 0xdeadbeef
+#endif
 
 #ifdef rvtest_gpr_save
 gpr_save:

diff --git a/riscv-test-suite/rv64i_m/Svadu/src/svadu_sv48.S b/riscv-test-suite/rv64i_m/Svadu/src/svadu_sv48.S
@@ -19,30 +19,26 @@ RVMODEL_BOOT
 RVTEST_CODE_BEGIN
 
 #ifdef TEST_CASE_1
-  RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);check ISA:=regex(.*Svadu.*);def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",svadu_sv48)
+  RVTEST_CASE(1,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);check ISA:=regex(.*Svadu.*);def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",svadu_sv48)
 
   RVTEST_SIGBASE(x1, signature_x1_0)
 
-  # enable pmp to cover 4 GiB address space
-  li t0, -1
-  csrw pmpaddr0, t0
-  li t0, PMP_TOR | PMP_X | PMP_W | PMP_R
-  csrw pmpcfg0, t0
+  # Setup PMP to cover 4G of address space
+  SETUP_PMP_SVADU_TEST(x1, offset, t0, t1, t2)
 
-  # ID map the page_4k
+  # Identity map the page_4k
   la t1, page_4k
   mv t2, t1
   PTE_SETUP_SV48(t1, PTE_V, t0, s2, t2, 3)
 
-  # enable virtual memory in Sv32 mode
+  # enable virtual memory in Sv48 mode
   SATP_SETUP(t0, t1, ((SATP_MODE & ~(SATP_MODE<<1)) * SATP_MODE_SV48))
 
   # test svadu
-  TEST_SVADU(x1, s2, page_4k, offset, 0x30a, MENVCFG_HADE)
-
-  RVMODEL_HALT
+  TEST_SVADU(x1, s2, page_4k, offset, 0x30a, MENVCFG_ADUE)
 #endif
 RVTEST_CODE_END
+RVMODEL_HALT
 
 RVTEST_DATA_BEGIN
   .align 12
@@ -63,8 +59,10 @@ CANARY;
 signature_x1_0:
   .fill 64*(XLEN/32),4,0xdeadbeef
 
+#ifdef rvtest_mtrap_routine
 mtrap_sigptr:
   .fill 128*4, 4, 0xdeadbeef
+#endif
 
 #ifdef rvtest_gpr_save
 gpr_save:

diff --git a/riscv-test-suite/rv64i_m/Svadu/src/svadu_sv57.S b/riscv-test-suite/rv64i_m/Svadu/src/svadu_sv57.S
@@ -19,30 +19,26 @@ RVMODEL_BOOT
 RVTEST_CODE_BEGIN
 
 #ifdef TEST_CASE_1
-  RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);check ISA:=regex(.*Svadu.*);def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",svadu_sv57)
+  RVTEST_CASE(1,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);check ISA:=regex(.*Svadu.*);def rvtest_mtrap_routine=True;def TEST_CASE_1=True;",svadu_sv57)
 
   RVTEST_SIGBASE(x1, signature_x1_0)
 
-  # enable pmp to cover 4 GiB address space
-  li t0, -1
-  csrw pmpaddr0, t0
-  li t0, PMP_TOR | PMP_X | PMP_W | PMP_R
-  csrw pmpcfg0, t0
+  # Setup PMP to cover 4G of address space
+  SETUP_PMP_SVADU_TEST(x1, offset, t0, t1, t2)
 
-  # ID map the page_4k
+  # Identity map the page_4k
   la t1, page_4k
   mv t2, t1
   PTE_SETUP_SV57(t1, PTE_V, t0, s2, t2, 4)
 
-  # enable virtual memory in Sv32 mode
+  # enable virtual memory in Sv57 mode
   SATP_SETUP(t0, t1, ((SATP_MODE & ~(SATP_MODE<<1)) * SATP_MODE_SV57))
 
   # test svadu
-  TEST_SVADU(x1, s2, page_4k, offset, 0x30a, MENVCFG_HADE)
-
-  RVMODEL_HALT
+  TEST_SVADU(x1, s2, page_4k, offset, 0x30a, MENVCFG_ADUE)
 #endif
 RVTEST_CODE_END
+RVMODEL_HALT
 
 RVTEST_DATA_BEGIN
   .align 12
@@ -63,8 +59,10 @@ CANARY;
 signature_x1_0:
   .fill 64*(XLEN/32),4,0xdeadbeef
 
+#ifdef rvtest_mtrap_routine
 mtrap_sigptr:
   .fill 128*4, 4, 0xdeadbeef
+#endif
 
 #ifdef rvtest_gpr_save
 gpr_save: