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Merge branch 'dev' into sv32_tests_cov
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UmerShahidengr authored Dec 31, 2024
2 parents 8b6893e + 083ffaf commit a6f8fc0
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Showing 45 changed files with 11,375 additions and 284 deletions.
3 changes: 2 additions & 1 deletion requirements.txt
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,7 @@ Jinja2
m2r2>=0.2.7
MarkupSafe>=1.1.1
mistune>=0.8.4
ordered-set>=4.1.0
oyaml>=0.9
packaging>=19.0
pbr>=5.3.1
Expand All @@ -26,7 +27,7 @@ Pygments>=2.4.2
pyparsing>=2.4.0
pytablewriter
pytest
python-constraint
python-constraint>=1.4.0
python-dateutil>=2.8.0
pytz>=2019.1
pyyaml
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4 changes: 3 additions & 1 deletion riscv-ctg/riscv_ctg/constants.py
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,8 @@
import os
from math import *
from string import Template

from ordered_set import OrderedSet
from riscv_isac.fp_dataset import *

root = os.path.abspath(os.path.dirname(__file__))
Expand Down Expand Up @@ -120,7 +122,7 @@ def gen_sign_dataset(bit_width):
t1 =( '' if bit_width%2 == 0 else '1') + ''.join(['01']*int(bit_width/2))
t2 =( '' if bit_width%2 == 0 else '0') + ''.join(['10']*int(bit_width/2))
data += [twos(t1,bit_width),twos(t2,bit_width)]
return list(set(data))
return list(OrderedSet(data))

def gen_usign_dataset(bit_width):
'''
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16 changes: 8 additions & 8 deletions riscv-ctg/riscv_ctg/cross_comb.py
Original file line number Diff line number Diff line change
Expand Up @@ -122,7 +122,7 @@ def cross_comb(self, cgf_node):
full_solution = []

if 'cross_comb' in cgf_node:
cross_comb = set(cgf_node['cross_comb'])
cross_comb = OrderedSet(cgf_node['cross_comb'])
else:
return

Expand Down Expand Up @@ -210,7 +210,7 @@ def eval_conds(*oprs_lst):
opr_lst += get_oprs(assgn)

# Remove redundant operands
opr_lst = list(set(opr_lst))
opr_lst = list(OrderedSet(opr_lst))

# Get possible instructions
problem.reset()
Expand Down Expand Up @@ -293,7 +293,7 @@ def exc_rd_zero(*oprs_lst):
opr_lst = get_oprs(cond)
opr_lst += get_oprs(assgn)

opr_lst = list(set(opr_lst))
opr_lst = list(OrderedSet(opr_lst))

if data[i] in self.OP_TEMPLATE: # If single instruction
instr = data[i]
Expand Down Expand Up @@ -363,7 +363,7 @@ def exc_rd_zero(*oprs_lst):

full_solution += [solution]

self.isa = list(set(isa_set))
self.isa = list(OrderedSet(isa_set))
return full_solution

def swreg(cross_comb_instrs):
Expand All @@ -381,10 +381,10 @@ def swreg(cross_comb_instrs):
if key != 'instr' and key != 'imm_val':
op_vals.add(val)

swreg_sol = set(['x'+str(x) for x in range(0,32 if 'e' not in base_isa else 16)]) - op_vals
swreg_sol = OrderedSet(['x'+str(x) for x in range(0,32 if 'e' not in base_isa else 16)]) - op_vals

sreg = random.choice(list(swreg_sol))
freg_Sol = swreg_sol - set(sreg)
freg_Sol = swreg_sol - OrderedSet(sreg)
freg = random.choice(list(freg_Sol))
return (sreg, freg)

Expand All @@ -401,7 +401,7 @@ def get_reginit_str(cross_comb_instrs, freg):
- List of initialization strings
'''

reg_init_lst = set()
reg_init_lst = OrderedSet()

for instr_dict in cross_comb_instrs:
if 'rd' in instr_dict:
Expand Down Expand Up @@ -455,7 +455,7 @@ def write_test(self, fprefix, cgf_node, usage_str, cov_label, full_solution):
sig_label = "signature_" + sreg + "_" + str(sreg_dict[sreg])
code = code + "\nRVTEST_SIGBASE(" + sreg + ", "+ sig_label + ")\n\n"

rd_lst = set()
rd_lst = OrderedSet()
# Generate instruction corresponding to each instruction dictionary
# Append signature update statements to store rd value after each instruction
code += '// Cross-combination test sequence\n'
Expand Down
2 changes: 1 addition & 1 deletion riscv-ctg/riscv_ctg/csr_comb.py
Original file line number Diff line number Diff line change
Expand Up @@ -267,7 +267,7 @@ def __init__(self, base_isa, xlen, randomize):
def csr_comb(self, cgf_node):
logger.debug('Generating tests for csr_comb')
if 'csr_comb' in cgf_node:
csr_comb = set(cgf_node['csr_comb'])
csr_comb = OrderedSet(cgf_node['csr_comb'])
else:
return

Expand Down
12 changes: 9 additions & 3 deletions riscv-ctg/riscv_ctg/ctg.py
Original file line number Diff line number Diff line change
Expand Up @@ -100,7 +100,7 @@ def gen_test(op_node, opcode):
logger.info('Writing tests for csr_comb')
csr_comb_gen.write_test(fprefix, node, usage_str, label, csr_comb_instr_dict)

def ctg(verbose, out, random ,xlen_arg,flen_arg, cgf_file,num_procs,base_isa, max_inst,inxFlag):
def ctg(verbose, out, random ,xlen_arg,flen_arg, cgf_file,num_procs,base_isa, max_inst,inxFlag,filter):
logger.level(verbose)
logger.info('****** RISC-V Compliance Test Generator {0} *******'.format(__version__ ))
logger.info('Copyright (c) 2020, InCore Semiconductors Pvt. Ltd.')
Expand Down Expand Up @@ -134,6 +134,12 @@ def ctg(verbose, out, random ,xlen_arg,flen_arg, cgf_file,num_procs,base_isa, ma
op_template = utils.load_yaml(const.template_files)
cgf = expand_cgf(cgf_file,xlen,flen)
pool = mp.Pool(num_procs)
results = pool.starmap(create_test, [(usage_str, node,label,base_isa,max_inst, op_template,
randomize, out_dir, xlen, flen, inxFlag) for label,node in cgf.items()])

args_list = []
for label,node in cgf.items():
if filter is not None and re.search(filter, label) is None:
continue
args_list.append((usage_str, node,label,base_isa,max_inst, op_template,
randomize, out_dir, xlen, flen, inxFlag))
results = pool.starmap(create_test, args_list)
pool.close()
40 changes: 16 additions & 24 deletions riscv-ctg/riscv_ctg/generator.py
Original file line number Diff line number Diff line change
Expand Up @@ -340,25 +340,17 @@ def opcomb(self, cgf):
solutions = []
op_conds = {}
opcomb_value = cgf.get("op_comb")
if "op_comb" in cgf:
op_comb = set(cgf["op_comb"])
else:
op_comb = set([])
op_comb = OrderedSet(opcomb_value or [])
for op in self.op_vars:
if op in cgf:
op_conds[op] = set(cgf[op])
else:
op_conds[op] = set([])
op_conds[op] = OrderedSet(cgf.get(op, []))
individual = False
nodiff = False
construct_constraint = lambda val: (lambda x: bool(x in val))
while any([len(op_conds[x])!=0 for x in op_conds]+[len(op_comb)!=0]):
cond_str = ''
cond_vars = []
if self.random:
problem = Problem(MinConflictsSolver())
else:
problem = Problem()
solver = MinConflictsSolver() if self.random else None
problem = Problem(solver)

done = False
for var in self.op_vars:
Expand Down Expand Up @@ -418,7 +410,7 @@ def eval_func(cond):
for var,val in zip(self.op_vars,op_tuple):
locals()[var] = val
return eval(cond)
sat_set = set(filter(eval_func,op_comb))
sat_set = OrderedSet(filter(eval_func,op_comb))
cond_str += ", ".join([var+"=="+solution[var] for var in cond_vars]+list(sat_set))
op_tuple.append(cond_str)
problem.reset()
Expand Down Expand Up @@ -450,7 +442,7 @@ def valcomb(self, cgf):
val_comb = []

conds = list(cgf['val_comb'].keys())
inds = set(range(len(conds)))
inds = OrderedSet(range(len(conds)))
merge = True
if 'fcvt' in self.opcode or 'fmv' in self.opcode:
if self.opcode.split(".")[-1] in ['x','w','wu','l','lu']:
Expand Down Expand Up @@ -479,7 +471,7 @@ def valcomb(self, cgf):
else:
logger.error("Invalid Coverpoint: More than one value of "+ i +" found!")
sys.exit(1)
if(set(d.keys()) != set(self.val_vars)):
if(OrderedSet(d.keys()) != OrderedSet(self.val_vars)):
logger.warning(
"Valcomb skip: Cannot bypass SAT Solver for partially defined coverpoints!"\
+ str(req_val_comb))
Expand Down Expand Up @@ -525,7 +517,7 @@ def eval_func(cond):
for var,val in zip(self.val_vars,val_tuple):
locals()[var] = val
return eval(cond)
sat_set=set(filter(lambda x: eval_func(conds[x]),inds))
sat_set=OrderedSet(filter(lambda x: eval_func(conds[x]),inds))
inds = inds - sat_set
val_tuple.append(req_val_comb+', '+', '.join([conds[i] for i in sat_set]))
problem.reset()
Expand Down Expand Up @@ -803,7 +795,7 @@ def gen_inst(self,op_comb, val_comb, cgf):

for op,val_soln in zip(op_comb,val_comb):
val = [x for x in val_soln]
if any([x=='x0' for x in op]) or not (len(op) == len(set(op))):
if any([x=='x0' for x in op]) or not (len(op) == len(OrderedSet(op))):
cont.append(val_soln)
op_inds = list(ind_dict.keys())
for i,x in enumerate(op_inds):
Expand Down Expand Up @@ -853,7 +845,7 @@ def gen_inst(self,op_comb, val_comb, cgf):
else:
instr_dict.append(self.__instr__(op,val))

hits = defaultdict(lambda:set([]))
hits = defaultdict(lambda:OrderedSet([]))
final_instr = []

rm_dict = {
Expand Down Expand Up @@ -898,29 +890,29 @@ def eval_inst_coverage(coverpoints,instr):
var_dict.update(ext_specific_vars)

if 'val_comb' in coverpoints:
valcomb_hits = set([])
valcomb_hits = OrderedSet([])
for coverpoint in coverpoints['val_comb']:
if eval(coverpoint,globals(),var_dict):
valcomb_hits.add(coverpoint)
cover_hits['val_comb']=valcomb_hits
if 'op_comb' in coverpoints:
opcomb_hits = set([])
opcomb_hits = OrderedSet([])
for coverpoint in coverpoints['op_comb']:
if eval(coverpoint,globals(),var_dict):
opcomb_hits.add(coverpoint)
cover_hits['op_comb']=opcomb_hits
if 'rs1' in coverpoints:
if var_dict['rs1'] in coverpoints['rs1']:
cover_hits['rs1'] = set([var_dict['rs1']])
cover_hits['rs1'] = OrderedSet([var_dict['rs1']])
if 'rs2' in coverpoints:
if var_dict['rs2'] in coverpoints['rs2']:
cover_hits['rs2'] = set([var_dict['rs2']])
cover_hits['rs2'] = OrderedSet([var_dict['rs2']])
if 'rs3' in coverpoints:
if var_dict['rs3'] in coverpoints['rs3']:
cover_hits['rs3'] = set([var_dict['rs3']])
cover_hits['rs3'] = OrderedSet([var_dict['rs3']])
if 'rd' in coverpoints:
if var_dict['rd'] in coverpoints['rd']:
cover_hits['rd'] = set([var_dict['rd']])
cover_hits['rd'] = OrderedSet([var_dict['rd']])
return cover_hits
i = 0

Expand Down
5 changes: 3 additions & 2 deletions riscv-ctg/riscv_ctg/main.py
Original file line number Diff line number Diff line change
Expand Up @@ -20,11 +20,12 @@
hardware.",default='32')
@click.option("--inst",type=int,help="Maximum number of Macro Instances per test.")
@click.option("--z-inx", '-ix', type=bool, default='False', help="If the extension is Z*inx then pass True otherwise defaulted to False")
def cli(verbose, out_dir, randomize , cgf,procs,base_isa, flen,inst,z_inx):
@click.option("--filter", type=str, help="Filtering tests to be generated with regex")
def cli(verbose, out_dir, randomize , cgf,procs,base_isa, flen,inst,z_inx,filter):
if not os.path.exists(out_dir):
os.mkdir(out_dir)
if '32' in base_isa:
xlen = 32
elif '64' in base_isa:
xlen = 64
ctg(verbose, out_dir, randomize ,xlen, int(flen), cgf,procs,base_isa,inst,z_inx)
ctg(verbose, out_dir, randomize ,xlen, int(flen), cgf,procs,base_isa,inst,z_inx,filter)
14 changes: 7 additions & 7 deletions riscv-isac/riscv_isac/coverage.py
Original file line number Diff line number Diff line change
Expand Up @@ -188,7 +188,7 @@ def __init__(self,label,coverpoint,xlen,flen,addr_pairs,sig_addrs,window_size,in
self.result = 0
self.queue = []

self.tracked_regs = set()
self.tracked_regs = OrderedSet()
self.instr_addr_of_tracked_reg = {} # tracked_reg: instr_addr of instr which triggered its tracking
self.instr_stat_meta_at_addr = {} # start_instr_addr: [is_ucovpt, num_exp, num_obs, num_rem, covpts_hit, code_seq, store_addresses, store_vals]

Expand Down Expand Up @@ -253,7 +253,7 @@ def compute_cross_cov(self):
Also perform tracking for generating the data propagation report
'''
hit_covpt = False
regs_to_track = set()
regs_to_track = OrderedSet()

for index in range(len(self.ops)):
instr = self.queue[index]
Expand Down Expand Up @@ -920,8 +920,8 @@ def compute_per_line(queue, event, cgf_queue, stats_queue, cgf, xlen, flen, addr
inxFlg = arch_state.inxFlg

# Set of elements to monitor for tracking signature updates
tracked_regs_immutable = set()
tracked_regs_mutable = set()
tracked_regs_immutable = OrderedSet()
tracked_regs_mutable = OrderedSet()
tracked_instrs = [] # list of tuples of the type (list_instr_names, triggering_instr_addr)

instr_stat_meta_at_addr = {} # Maps an address to the stat metadata of the instruction present at that address [is_ucovpt, num_exp, num_obs, num_rem, covpts_hit, code_seq, store_addresses, store_vals]
Expand Down Expand Up @@ -1262,7 +1262,7 @@ def get_key_from_value(dictionary, target_value):
if hit_csr_covpt:
stats.cov_pt_sig += covpt

csr_regs_involved_in_covpt = set()
csr_regs_involved_in_covpt = OrderedSet()
for covpt in csr_covpt:
for reg in csr_reg_num_to_str.values():
if reg in covpt:
Expand Down Expand Up @@ -1717,7 +1717,7 @@ def compute(trace_file, test_name, cgf, parser_name, decoder_name, detailed, xle
_x = (hex(x[0]), hex(x[1]), str(int((x[1]-x[0])/4)) + ' words')
sig_addrs_hex.append(_x)

cov_set = set()
cov_set = OrderedSet()
count = 1
for addrs,vals,cover,code in stats.stat1:
sig = ''
Expand Down Expand Up @@ -1753,7 +1753,7 @@ def compute(trace_file, test_name, cgf, parser_name, decoder_name, detailed, xle
stat3_log += _l + '\n\n'

stat5_log = ''
sig_set = set()
sig_set = OrderedSet()
overwrites = 0
for addr, val, cover, code in stats.stat5:
if addr in sig_set:
Expand Down
5 changes: 3 additions & 2 deletions riscv-isac/riscv_isac/data/rvopcodesdecoder.py
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,7 @@
from collections import defaultdict
import pprint
import os
from ordered_set import OrderedSet

from constants import *
#from riscv_isac.data.constants import *
Expand Down Expand Up @@ -232,13 +233,13 @@ def build_instr_dict(inst_dict):
funct_occ = [funct[0] for ins in funct_list for funct in ins]

# Path recoder
funct_path = set()
funct_path = OrderedSet()
# Check if there are functions remaining
while funct_occ:
if (1, 0) in funct_occ:
max_funct = (1, 0)
else:
max_funct = max(set(funct_occ),key=funct_occ.count)
max_funct = max(OrderedSet(funct_occ),key=funct_occ.count)

funct_occ = list(filter(lambda a: a != max_funct, funct_occ))

Expand Down
3 changes: 2 additions & 1 deletion riscv-isac/riscv_isac/fp_dataset.py
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,7 @@
import random
import sys
import math
from ordered_set import OrderedSet
from decimal import *

# Prasanna
Expand Down Expand Up @@ -4941,7 +4942,7 @@ def ibm_b24(flen, iflen, opcode, ops, inxFlg=False):
t = "{:e}".format(data[0])
b24_comb.append((floatingPoint_tohex(iflen,float(t)),data[1]))

b24_comb = set(b24_comb)
b24_comb = OrderedSet(b24_comb)

coverpoints = []
k=0
Expand Down
7 changes: 4 additions & 3 deletions riscv-isac/riscv_isac/plugins/internaldecoder.py
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
from ordered_set import OrderedSet
import riscv_isac.plugins as plugins

class disassembler():
Expand Down Expand Up @@ -38,9 +39,9 @@ def __init__(self):
self.C_OPCODES = C_OPCODES
self.OPCODES = OPCODES
self.init_rvp_dictionary()
self.rvp_rs1_is_64bit_set = set('smal add64 radd64 uradd64 kadd64 ukadd64 sub64 rsub64 ursub64 ksub64 uksub64 wext wexti'.split())
self.rvp_rs2_is_64bit_set = set( 'add64 radd64 uradd64 kadd64 ukadd64 sub64 rsub64 ursub64 ksub64 uksub64'.split())
self.rvp_rd_is_64bit_set = set('smul16 smulx16 umul16 umulx16 smul8 smulx8 umul8 umulx8 smal add64 radd64 uradd64 kadd64 ukadd64 sub64 rsub64 ursub64 ksub64 uksub64 smar64 smsr64 umar64 umsr64 kmar64 kmsr64 ukmar64 ukmsr64 smalbb smalbt smaltt smalda smalxda smalds smaldrs smalxds smslda smslxda mulr64 mulsr64 wext wexti'.split())
self.rvp_rs1_is_64bit_set = OrderedSet('smal add64 radd64 uradd64 kadd64 ukadd64 sub64 rsub64 ursub64 ksub64 uksub64 wext wexti'.split())
self.rvp_rs2_is_64bit_set = OrderedSet( 'add64 radd64 uradd64 kadd64 ukadd64 sub64 rsub64 ursub64 ksub64 uksub64'.split())
self.rvp_rd_is_64bit_set = OrderedSet('smul16 smulx16 umul16 umulx16 smul8 smulx8 umul8 umulx8 smal add64 radd64 uradd64 kadd64 ukadd64 sub64 rsub64 ursub64 ksub64 uksub64 smar64 smsr64 umar64 umsr64 kmar64 kmsr64 ukmar64 ukmsr64 smalbb smalbt smaltt smalda smalxda smalds smaldrs smalxds smslda smslxda mulr64 mulsr64 wext wexti'.split())

def init_rvp_dictionary(self):
# Create RVP Dictiory 0 for instruction: clrs8 clrs16 clrs32 clo8 clo16 clo32 clz8 clz16 clz32 kabs8 kabs16 kabsw sunpkd810 sunpkd820 sunpkd830 sunpkd831 sunpkd832 swap8 zunpkd810 zunpkd820 zunpkd830 zunpkd831 zunpkd832 kabs32
Expand Down
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