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@UmerShahidengr
UmerShahidengr committed Oct 25, 2024
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33 changes: 33 additions & 0 deletions riscof-plugins/rv32/riscof_work/Makefile.Reference-sail_c_simulator
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.PHONY : TARGET0
TARGET0 :
@cd /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/riscof_work/src/div-01.S;riscv32-unknown-elf-gcc -march=rv32im -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles -T /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/sail_cSim/env/link.ld -I /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/sail_cSim/env/ -I /home/user/Work/Tests/riscv-test-suite/env -mabi=ilp32 /home/user/Work/Tests/riscv-test-suite/rv32i_m/M/src/div-01.S -o ref.elf -DTEST_CASE_1=True -DXLEN=32;riscv32-unknown-elf-objdump -D ref.elf > ref.disass;riscv_sim_RV32 -i -v --trace=step --pmp-count=16 --pmp-grain=0 --test-signature=/home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/riscof_work/src/div-01.S/Reference-sail_c_simulator.signature ref.elf > div-01.log 2>&1;riscv_isac --verbose info coverage -d -t div-01.log --parser-name c_sail -o coverage.rpt --sig-label begin_signature end_signature --test-label rvtest_code_begin rvtest_code_end -e ref.elf -c /home/user/Work/New_Repo/riscv-arch-test-PR/coverage/dataset.cgf -c /home/user/Work/New_Repo/riscv-arch-test-PR/coverage/m/rv32im.cgf -x32 -l div ;

.PHONY : TARGET1
TARGET1 :
@cd /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/riscof_work/src/divu-01.S;riscv32-unknown-elf-gcc -march=rv32im -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles -T /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/sail_cSim/env/link.ld -I /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/sail_cSim/env/ -I /home/user/Work/Tests/riscv-test-suite/env -mabi=ilp32 /home/user/Work/Tests/riscv-test-suite/rv32i_m/M/src/divu-01.S -o ref.elf -DTEST_CASE_1=True -DXLEN=32;riscv32-unknown-elf-objdump -D ref.elf > ref.disass;riscv_sim_RV32 -i -v --trace=step --pmp-count=16 --pmp-grain=0 --test-signature=/home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/riscof_work/src/divu-01.S/Reference-sail_c_simulator.signature ref.elf > divu-01.log 2>&1;riscv_isac --verbose info coverage -d -t divu-01.log --parser-name c_sail -o coverage.rpt --sig-label begin_signature end_signature --test-label rvtest_code_begin rvtest_code_end -e ref.elf -c /home/user/Work/New_Repo/riscv-arch-test-PR/coverage/dataset.cgf -c /home/user/Work/New_Repo/riscv-arch-test-PR/coverage/m/rv32im.cgf -x32 -l divu ;

.PHONY : TARGET2
TARGET2 :
@cd /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/riscof_work/src/mul-01.S;riscv32-unknown-elf-gcc -march=rv32im -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles -T /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/sail_cSim/env/link.ld -I /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/sail_cSim/env/ -I /home/user/Work/Tests/riscv-test-suite/env -mabi=ilp32 /home/user/Work/Tests/riscv-test-suite/rv32i_m/M/src/mul-01.S -o ref.elf -DTEST_CASE_1=True -DXLEN=32;riscv32-unknown-elf-objdump -D ref.elf > ref.disass;riscv_sim_RV32 -i -v --trace=step --pmp-count=16 --pmp-grain=0 --test-signature=/home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/riscof_work/src/mul-01.S/Reference-sail_c_simulator.signature ref.elf > mul-01.log 2>&1;riscv_isac --verbose info coverage -d -t mul-01.log --parser-name c_sail -o coverage.rpt --sig-label begin_signature end_signature --test-label rvtest_code_begin rvtest_code_end -e ref.elf -c /home/user/Work/New_Repo/riscv-arch-test-PR/coverage/dataset.cgf -c /home/user/Work/New_Repo/riscv-arch-test-PR/coverage/m/rv32im.cgf -x32 -l mul -l mul ;

.PHONY : TARGET3
TARGET3 :
@cd /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/riscof_work/src/mulh-01.S;riscv32-unknown-elf-gcc -march=rv32im -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles -T /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/sail_cSim/env/link.ld -I /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/sail_cSim/env/ -I /home/user/Work/Tests/riscv-test-suite/env -mabi=ilp32 /home/user/Work/Tests/riscv-test-suite/rv32i_m/M/src/mulh-01.S -o ref.elf -DTEST_CASE_1=True -DXLEN=32;riscv32-unknown-elf-objdump -D ref.elf > ref.disass;riscv_sim_RV32 -i -v --trace=step --pmp-count=16 --pmp-grain=0 --test-signature=/home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/riscof_work/src/mulh-01.S/Reference-sail_c_simulator.signature ref.elf > mulh-01.log 2>&1;riscv_isac --verbose info coverage -d -t mulh-01.log --parser-name c_sail -o coverage.rpt --sig-label begin_signature end_signature --test-label rvtest_code_begin rvtest_code_end -e ref.elf -c /home/user/Work/New_Repo/riscv-arch-test-PR/coverage/dataset.cgf -c /home/user/Work/New_Repo/riscv-arch-test-PR/coverage/m/rv32im.cgf -x32 -l mulh -l mulh ;

.PHONY : TARGET4
TARGET4 :
@cd /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/riscof_work/src/mulhsu-01.S;riscv32-unknown-elf-gcc -march=rv32im -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles -T /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/sail_cSim/env/link.ld -I /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/sail_cSim/env/ -I /home/user/Work/Tests/riscv-test-suite/env -mabi=ilp32 /home/user/Work/Tests/riscv-test-suite/rv32i_m/M/src/mulhsu-01.S -o ref.elf -DTEST_CASE_1=True -DXLEN=32;riscv32-unknown-elf-objdump -D ref.elf > ref.disass;riscv_sim_RV32 -i -v --trace=step --pmp-count=16 --pmp-grain=0 --test-signature=/home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/riscof_work/src/mulhsu-01.S/Reference-sail_c_simulator.signature ref.elf > mulhsu-01.log 2>&1;riscv_isac --verbose info coverage -d -t mulhsu-01.log --parser-name c_sail -o coverage.rpt --sig-label begin_signature end_signature --test-label rvtest_code_begin rvtest_code_end -e ref.elf -c /home/user/Work/New_Repo/riscv-arch-test-PR/coverage/dataset.cgf -c /home/user/Work/New_Repo/riscv-arch-test-PR/coverage/m/rv32im.cgf -x32 -l mulhsu -l mulhsu ;

.PHONY : TARGET5
TARGET5 :
@cd /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/riscof_work/src/mulhu-01.S;riscv32-unknown-elf-gcc -march=rv32im -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles -T /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/sail_cSim/env/link.ld -I /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/sail_cSim/env/ -I /home/user/Work/Tests/riscv-test-suite/env -mabi=ilp32 /home/user/Work/Tests/riscv-test-suite/rv32i_m/M/src/mulhu-01.S -o ref.elf -DTEST_CASE_1=True -DXLEN=32;riscv32-unknown-elf-objdump -D ref.elf > ref.disass;riscv_sim_RV32 -i -v --trace=step --pmp-count=16 --pmp-grain=0 --test-signature=/home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/riscof_work/src/mulhu-01.S/Reference-sail_c_simulator.signature ref.elf > mulhu-01.log 2>&1;riscv_isac --verbose info coverage -d -t mulhu-01.log --parser-name c_sail -o coverage.rpt --sig-label begin_signature end_signature --test-label rvtest_code_begin rvtest_code_end -e ref.elf -c /home/user/Work/New_Repo/riscv-arch-test-PR/coverage/dataset.cgf -c /home/user/Work/New_Repo/riscv-arch-test-PR/coverage/m/rv32im.cgf -x32 -l mulhu -l mulhu ;

.PHONY : TARGET6
TARGET6 :
@cd /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/riscof_work/src/rem-01.S;riscv32-unknown-elf-gcc -march=rv32im -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles -T /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/sail_cSim/env/link.ld -I /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/sail_cSim/env/ -I /home/user/Work/Tests/riscv-test-suite/env -mabi=ilp32 /home/user/Work/Tests/riscv-test-suite/rv32i_m/M/src/rem-01.S -o ref.elf -DTEST_CASE_1=True -DXLEN=32;riscv32-unknown-elf-objdump -D ref.elf > ref.disass;riscv_sim_RV32 -i -v --trace=step --pmp-count=16 --pmp-grain=0 --test-signature=/home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/riscof_work/src/rem-01.S/Reference-sail_c_simulator.signature ref.elf > rem-01.log 2>&1;riscv_isac --verbose info coverage -d -t rem-01.log --parser-name c_sail -o coverage.rpt --sig-label begin_signature end_signature --test-label rvtest_code_begin rvtest_code_end -e ref.elf -c /home/user/Work/New_Repo/riscv-arch-test-PR/coverage/dataset.cgf -c /home/user/Work/New_Repo/riscv-arch-test-PR/coverage/m/rv32im.cgf -x32 -l rem ;

.PHONY : TARGET7
TARGET7 :
@cd /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/riscof_work/src/remu-01.S;riscv32-unknown-elf-gcc -march=rv32im -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles -T /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/sail_cSim/env/link.ld -I /home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/sail_cSim/env/ -I /home/user/Work/Tests/riscv-test-suite/env -mabi=ilp32 /home/user/Work/Tests/riscv-test-suite/rv32i_m/M/src/remu-01.S -o ref.elf -DTEST_CASE_1=True -DXLEN=32;riscv32-unknown-elf-objdump -D ref.elf > ref.disass;riscv_sim_RV32 -i -v --trace=step --pmp-count=16 --pmp-grain=0 --test-signature=/home/user/Work/New_Repo/riscv-arch-test-PR/riscof-plugins/rv32/riscof_work/src/remu-01.S/Reference-sail_c_simulator.signature ref.elf > remu-01.log 2>&1;riscv_isac --verbose info coverage -d -t remu-01.log --parser-name c_sail -o coverage.rpt --sig-label begin_signature end_signature --test-label rvtest_code_begin rvtest_code_end -e ref.elf -c /home/user/Work/New_Repo/riscv-arch-test-PR/coverage/dataset.cgf -c /home/user/Work/New_Repo/riscv-arch-test-PR/coverage/m/rv32im.cgf -x32 -l remu ;
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