i2c: bcm2835: Set up the rising/falling edge delays #2407
Merged
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We were leaving them in the power on state (or the state the firmware
had set up for some client, if we were taking over from them). The
boot state was 30 core clocks, when we actually want to sample some
time after (to make sure that the new input bit has actually arrived).
Signed-off-by: Eric Anholt [email protected]
Signed-off-by: Boris Brezillon [email protected]
Signed-off-by: Wolfram Sang [email protected]
Cc: [email protected]
(cherry picked from commit fe32a81)