Split out arm_atsam shift register logic

keyboards/massdrop/alt/config.h

@@ -50,22 +50,18 @@ along with this program.  If not, see <http://www.gnu.org/licenses/>.
 /* This Shift Register expands available hardware output lines to control additional peripherals */
 /* It uses four lines from the MCU to provide 16 output lines */
 /* Shift Register Clock configuration (MCU to ShiftRegister.RCLK) */
-#define SR_EXP_RCLK_PORT            PB
-#define SR_EXP_RCLK_PIN             14
+#define SR_EXP_RCLK_PIN          B14
 /* Shift Register Output Enable configuration (MCU to ShiftRegister.OE_N) */
-#define SR_EXP_OE_N_PORT            PB
-#define SR_EXP_OE_N_PIN             15
+#define SR_EXP_OE_PIN            B15
 /* SERCOM port to use for Shift Register SPI */
 /* DATAOUT and SCLK must be configured to use hardware pins of this port */
-#define SR_EXP_SERCOM               SERCOM2
+#define SPI_SERCOM               SERCOM2
 /* Shift Register SPI Data Out configuration (MCU.SERCOMx.PAD[0] to ShiftRegister.SER) */
-#define SR_EXP_DATAOUT_PORT         PA
-#define SR_EXP_DATAOUT_PIN          12
-#define SR_EXP_DATAOUT_MUX          2
+#define SPI_DATAOUT_PIN          A12
+#define SPI_DATAOUT_MUX          2
 /* Shift Register SPI Serial Clock configuration (MCU.SERCOMx.PAD[1] to ShiftRegister.SRCLK) */
-#define SR_EXP_SCLK_PORT            PA
-#define SR_EXP_SCLK_PIN             13
-#define SR_EXP_SCLK_MUX             2
+#define SPI_SCLK_PIN             A13
+#define SPI_SCLK_MUX             2
 
 /* Debug LED (Small LED Located near MCU) */
 #define DEBUG_LED_ENABLE            1

keyboards/massdrop/ctrl/config.h

@@ -49,22 +49,18 @@ along with this program.  If not, see <http://www.gnu.org/licenses/>.
 /* This Shift Register expands available hardware output lines to control additional peripherals */
 /* It uses four lines from the MCU to provide 16 output lines */
 /* Shift Register Clock configuration (MCU to ShiftRegister.RCLK) */
-#define SR_EXP_RCLK_PORT            PB
-#define SR_EXP_RCLK_PIN             14
+#define SR_EXP_RCLK_PIN          B14
 /* Shift Register Output Enable configuration (MCU to ShiftRegister.OE_N) */
-#define SR_EXP_OE_N_PORT            PB
-#define SR_EXP_OE_N_PIN             15
+#define SR_EXP_OE_PIN            B15
 /* SERCOM port to use for Shift Register SPI */
 /* DATAOUT and SCLK must be configured to use hardware pins of this port */
-#define SR_EXP_SERCOM               SERCOM2
+#define SPI_SERCOM               SERCOM2
 /* Shift Register SPI Data Out configuration (MCU.SERCOMx.PAD[0] to ShiftRegister.SER) */
-#define SR_EXP_DATAOUT_PORT         PA
-#define SR_EXP_DATAOUT_PIN          12
-#define SR_EXP_DATAOUT_MUX          2
+#define SPI_DATAOUT_PIN          A12
+#define SPI_DATAOUT_MUX          2
 /* Shift Register SPI Serial Clock configuration (MCU.SERCOMx.PAD[1] to ShiftRegister.SRCLK) */
-#define SR_EXP_SCLK_PORT            PA
-#define SR_EXP_SCLK_PIN             13
-#define SR_EXP_SCLK_MUX             2
+#define SPI_SCLK_PIN             A13
+#define SPI_SCLK_MUX             2
 
 /* Debug LED (Small LED Located near MCU) */
 #define DEBUG_LED_ENABLE            1

tmk_core/common/arm_atsam/gpio.h

@@ -64,7 +64,13 @@ typedef uint8_t pin_t;
         PORT->Group[SAMD_PORT(pin)].OUTCLR.reg = SAMD_PIN_MASK(pin); \
     } while (0)
 
-#define writePin(pin, level) ((level) ? (writePinHigh(pin)) : (writePinLow(pin)))
+#define writePin(pin, level)                                             \
+    do {                                                                 \
+        if (level)                                                       \
+            PORT->Group[SAMD_PORT(pin)].OUTSET.reg = SAMD_PIN_MASK(pin); \
+        else                                                             \
+            PORT->Group[SAMD_PORT(pin)].OUTCLR.reg = SAMD_PIN_MASK(pin); \
+    } while (0)
 
 #define readPin(pin) ((PORT->Group[SAMD_PORT(pin)].IN.reg & SAMD_PIN_MASK(pin)) != 0)
 

tmk_core/protocol/arm_atsam.mk

@@ -9,7 +9,8 @@ ifeq ($(RGB_MATRIX_DRIVER),custom)
   SRC += $(ARM_ATSAM_DIR)/md_rgb_matrix.c
 endif
 SRC += $(ARM_ATSAM_DIR)/main_arm_atsam.c
-SRC += $(ARM_ATSAM_DIR)/spi.c
+SRC += $(ARM_ATSAM_DIR)/shift_register.c
+SRC += $(ARM_ATSAM_DIR)/spi_master.c
 SRC += $(ARM_ATSAM_DIR)/startup.c
 
 SRC += $(ARM_ATSAM_DIR)/usb/main_usb.c

tmk_core/protocol/arm_atsam/arm_atsam_protocol.h

@@ -27,7 +27,7 @@ along with this program.  If not, see <http://www.gnu.org/licenses/>.
 #include "wait.h"
 #include "adc.h"
 #include "i2c_master.h"
-#include "spi.h"
+#include "shift_register.h"
 
 #include "./usb/usb2422.h"
 

tmk_core/protocol/arm_atsam/shift_register.c

@@ -0,0 +1,118 @@
+/*
+Copyright 2018 Massdrop Inc.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include "arm_atsam_protocol.h"
+
+#include "spi_master.h"
+#include "wait.h"
+#include "gpio.h"
+
+// #define SR_USE_BITBANG
+
+// Bodge for when spi_master is not available
+#ifdef SR_USE_BITBANG
+#    define CLOCK_DELAY 10
+
+void shift_init_impl(void) {
+    setPinOutput(SR_EXP_RCLK_PIN);
+    setPinOutput(SPI_DATAOUT_PIN);
+    setPinOutput(SPI_SCLK_PIN);
+}
+
+void shift_out_impl(const uint8_t *data, uint16_t length) {
+    writePinLow(SR_EXP_RCLK_PIN);
+    for (uint16_t i = 0; i < length; i++) {
+        uint8_t val = data[i];
+
+        // shift out lsb first
+        for (uint8_t bit = 0; bit < 8; bit++) {
+            writePin(SPI_DATAOUT_PIN, !!(val & (1 << bit)));
+            writePin(SPI_SCLK_PIN, true);
+            wait_us(CLOCK_DELAY);
+
+            writePin(SPI_SCLK_PIN, false);
+            wait_us(CLOCK_DELAY);
+        }
+    }
+    writePinHigh(SR_EXP_RCLK_PIN);
+    return SPI_STATUS_SUCCESS;
+}
+
+#else
+
+void shift_init_impl(void) { spi_init(); }
+
+void shift_out_impl(const uint8_t *data, uint16_t length) {
+    spi_start(SR_EXP_RCLK_PIN, true, 0, 0);
+
+    spi_transmit(data, length);
+
+    spi_stop();
+}
+#endif
+
+// ***************************************************************
+
+void shift_out(const uint8_t *data, uint16_t length) { shift_out_impl(data, length); }
+
+void shift_enable(void) {
+    setPinOutput(SR_EXP_OE_PIN);
+    writePinLow(SR_EXP_OE_PIN);
+}
+
+void shift_disable(void) {
+    setPinOutput(SR_EXP_OE_PIN);
+    writePinHigh(SR_EXP_OE_PIN);
+}
+
+void shift_init(void) {
+    shift_disable();
+    shift_init_impl();
+}
+
+// ***************************************************************
+
+sr_exp_t sr_exp_data;
+
+void SR_EXP_WriteData(void) {
+    uint8_t data[2] = {
+        sr_exp_data.reg & 0xFF,         // Shift in bits 7-0
+        (sr_exp_data.reg >> 8) & 0xFF,  // Shift in bits 15-8
+    };
+    shift_out(data, 2);
+}
+
+void SR_EXP_Init(void) {
+    shift_init();
+
+    sr_exp_data.reg             = 0;
+    sr_exp_data.bit.HUB_CONNECT = 0;
+    sr_exp_data.bit.HUB_RESET_N = 0;
+    sr_exp_data.bit.S_UP        = 0;
+    sr_exp_data.bit.E_UP_N      = 1;
+    sr_exp_data.bit.S_DN1       = 1;
+    sr_exp_data.bit.E_DN1_N     = 1;
+    sr_exp_data.bit.E_VBUS_1    = 0;
+    sr_exp_data.bit.E_VBUS_2    = 0;
+    sr_exp_data.bit.SRC_1       = 1;
+    sr_exp_data.bit.SRC_2       = 1;
+    sr_exp_data.bit.IRST        = 1;
+    sr_exp_data.bit.SDB_N       = 0;
+    SR_EXP_WriteData();
+
+    shift_enable();
+}

tmk_core/protocol/arm_atsam/spi.h → tmk_core/protocol/arm_atsam/shift_register.h

@@ -15,28 +15,9 @@ You should have received a copy of the GNU General Public License
 along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */
 
-#ifndef _SPI_H_
-#define _SPI_H_
+#pragma once
 
-/* Macros for Shift Register control */
-#define SR_EXP_RCLK_LO PORT->Group[SR_EXP_RCLK_PORT].OUTCLR.reg = (1 << SR_EXP_RCLK_PIN)
-#define SR_EXP_RCLK_HI PORT->Group[SR_EXP_RCLK_PORT].OUTSET.reg = (1 << SR_EXP_RCLK_PIN)
-#define SR_EXP_OE_N_ENA PORT->Group[SR_EXP_OE_N_PORT].OUTCLR.reg = (1 << SR_EXP_OE_N_PIN)
-#define SR_EXP_OE_N_DIS PORT->Group[SR_EXP_OE_N_PORT].OUTSET.reg = (1 << SR_EXP_OE_N_PIN)
-
-/* Determine bits to set for mux selection */
-#if SR_EXP_DATAOUT_PIN % 2 == 0
-#    define SR_EXP_DATAOUT_MUX_SEL PMUXE
-#else
-#    define SR_EXP_DATAOUT_MUX_SEL PMUXO
-#endif
-
-/* Determine bits to set for mux selection */
-#if SR_EXP_SCLK_PIN % 2 == 0
-#    define SR_EXP_SCLK_MUX_SEL PMUXE
-#else
-#    define SR_EXP_SCLK_MUX_SEL PMUXO
-#endif
+#include <stdint.h>
 
 /* Data structure to define Shift Register output expander hardware */
 /* This structure gets shifted into registers LSB first */
@@ -66,5 +47,3 @@ extern sr_exp_t sr_exp_data;
 
 void SR_EXP_WriteData(void);
 void SR_EXP_Init(void);
-
-#endif  //_SPI_H_