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qmk · Nov 1, 2021 · 2f83654 · 2f83654
1 parent ee371c1
commit 2f83654
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Showing 30 changed files with 597 additions and 525 deletions.
diff --git a/drivers/sensors/adns5050.c b/drivers/sensors/adns5050.c
@@ -17,7 +17,6 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-
 #include "adns5050.h"
 #include "wait.h"
 #include "debug.h"
@@ -61,13 +60,9 @@ void adns_sync(void) {
     writePinHigh(ADNS_CS_PIN);
 }
 
-void adns_cs_select(void) {
-    writePinLow(ADNS_CS_PIN);
-}
+void adns_cs_select(void) { writePinLow(ADNS_CS_PIN); }
 
-void adns_cs_deselect(void) {
-    writePinHigh(ADNS_CS_PIN);
-}
+void adns_cs_deselect(void) { writePinHigh(ADNS_CS_PIN); }
 
 uint8_t adns_serial_read(void) {
     setPinInput(ADNS_SDIO_PIN);
@@ -121,7 +116,7 @@ uint8_t adns_read_reg(uint8_t reg_addr) {
     // We don't need a minimum tSRAD here. That's because a 4ms wait time is
     // already included in adns_serial_write(), so we're good.
     // See page 10 and 15 of the ADNS spec sheet.
-    //wait_us(4);
+    // wait_us(4);
 
     uint8_t byte = adns_serial_read();
 
@@ -138,7 +133,7 @@ uint8_t adns_read_reg(uint8_t reg_addr) {
 
 void adns_write_reg(uint8_t reg_addr, uint8_t data) {
     adns_cs_select();
-    adns_serial_write( 0b10000000 | reg_addr );
+    adns_serial_write(0b10000000 | reg_addr);
     adns_serial_write(data);
     adns_cs_deselect();
 }
@@ -155,7 +150,7 @@ report_adns_t adns_read_burst(void) {
     // We don't need a minimum tSRAD here. That's because a 4ms wait time is
     // already included in adns_serial_write(), so we're good.
     // See page 10 and 15 of the ADNS spec sheet.
-    //wait_us(4);
+    // wait_us(4);
 
     uint8_t x = adns_serial_read();
     uint8_t y = adns_serial_read();
@@ -180,13 +175,11 @@ int8_t convert_twoscomp(uint8_t data) {
 }
 
 // Don't forget to use the definitions for CPI in the header file.
-void adns_set_cpi(uint8_t cpi) {
-    adns_write_reg(REG_MOUSE_CONTROL2, cpi);
-}
+void adns_set_cpi(uint8_t cpi) { adns_write_reg(REG_MOUSE_CONTROL2, cpi); }
 
 bool adns_check_signature(void) {
-    uint8_t pid = adns_read_reg(REG_PRODUCT_ID);
-    uint8_t rid = adns_read_reg(REG_REVISION_ID);
+    uint8_t pid  = adns_read_reg(REG_PRODUCT_ID);
+    uint8_t rid  = adns_read_reg(REG_REVISION_ID);
     uint8_t pid2 = adns_read_reg(REG_PRODUCT_ID2);
 
     return (pid == 0x12 && rid == 0x01 && pid2 == 0x26);

diff --git a/drivers/sensors/adns5050.h b/drivers/sensors/adns5050.h
@@ -67,13 +67,13 @@ typedef struct {
 // A bunch of functions to implement the ADNS5050-specific serial protocol.
 // Note that the "serial.h" driver is insufficient, because it does not
 // manually manipulate a serial clock signal.
-void adns_init(void);
-void adns_sync(void);
-uint8_t adns_serial_read(void);
-void adns_serial_write(uint8_t data);
-uint8_t adns_read_reg(uint8_t reg_addr);
-void adns_write_reg(uint8_t reg_addr, uint8_t data);
+void          adns_init(void);
+void          adns_sync(void);
+uint8_t       adns_serial_read(void);
+void          adns_serial_write(uint8_t data);
+uint8_t       adns_read_reg(uint8_t reg_addr);
+void          adns_write_reg(uint8_t reg_addr, uint8_t data);
 report_adns_t adns_read_burst(void);
-int8_t convert_twoscomp(uint8_t data);
-void adns_set_cpi(uint8_t cpi);
-bool adns_check_signature(void);
+int8_t        convert_twoscomp(uint8_t data);
+void          adns_set_cpi(uint8_t cpi);
+bool          adns_check_signature(void);
diff --git a/drivers/sensors/adns9800.c b/drivers/sensors/adns9800.c
@@ -20,57 +20,57 @@
 #include "adns9800.h"
 
 // registers
-#define REG_Product_ID                           0x00
-#define REG_Revision_ID                          0x01
-#define REG_Motion                               0x02
-#define REG_Delta_X_L                            0x03
-#define REG_Delta_X_H                            0x04
-#define REG_Delta_Y_L                            0x05
-#define REG_Delta_Y_H                            0x06
-#define REG_SQUAL                                0x07
-#define REG_Pixel_Sum                            0x08
-#define REG_Maximum_Pixel                        0x09
-#define REG_Minimum_Pixel                        0x0a
-#define REG_Shutter_Lower                        0x0b
-#define REG_Shutter_Upper                        0x0c
-#define REG_Frame_Period_Lower                   0x0d
-#define REG_Frame_Period_Upper                   0x0e
-#define REG_Configuration_I                      0x0f
-#define REG_Configuration_II                     0x10
-#define REG_Frame_Capture                        0x12
-#define REG_SROM_Enable                          0x13
-#define REG_Run_Downshift                        0x14
-#define REG_Rest1_Rate                           0x15
-#define REG_Rest1_Downshift                      0x16
-#define REG_Rest2_Rate                           0x17
-#define REG_Rest2_Downshift                      0x18
-#define REG_Rest3_Rate                           0x19
-#define REG_Frame_Period_Max_Bound_Lower         0x1a
-#define REG_Frame_Period_Max_Bound_Upper         0x1b
-#define REG_Frame_Period_Min_Bound_Lower         0x1c
-#define REG_Frame_Period_Min_Bound_Upper         0x1d
-#define REG_Shutter_Max_Bound_Lower              0x1e
-#define REG_Shutter_Max_Bound_Upper              0x1f
-#define REG_LASER_CTRL0                          0x20
-#define REG_Observation                          0x24
-#define REG_Data_Out_Lower                       0x25
-#define REG_Data_Out_Upper                       0x26
-#define REG_SROM_ID                              0x2a
-#define REG_Lift_Detection_Thr                   0x2e
-#define REG_Configuration_V                      0x2f
-#define REG_Configuration_IV                     0x39
-#define REG_Power_Up_Reset                       0x3a
-#define REG_Shutdown                             0x3b
-#define REG_Inverse_Product_ID                   0x3f
-#define REG_Motion_Burst                         0x50
-#define REG_SROM_Load_Burst                      0x62
-#define REG_Pixel_Burst                          0x64
+#define REG_Product_ID 0x00
+#define REG_Revision_ID 0x01
+#define REG_Motion 0x02
+#define REG_Delta_X_L 0x03
+#define REG_Delta_X_H 0x04
+#define REG_Delta_Y_L 0x05
+#define REG_Delta_Y_H 0x06
+#define REG_SQUAL 0x07
+#define REG_Pixel_Sum 0x08
+#define REG_Maximum_Pixel 0x09
+#define REG_Minimum_Pixel 0x0a
+#define REG_Shutter_Lower 0x0b
+#define REG_Shutter_Upper 0x0c
+#define REG_Frame_Period_Lower 0x0d
+#define REG_Frame_Period_Upper 0x0e
+#define REG_Configuration_I 0x0f
+#define REG_Configuration_II 0x10
+#define REG_Frame_Capture 0x12
+#define REG_SROM_Enable 0x13
+#define REG_Run_Downshift 0x14
+#define REG_Rest1_Rate 0x15
+#define REG_Rest1_Downshift 0x16
+#define REG_Rest2_Rate 0x17
+#define REG_Rest2_Downshift 0x18
+#define REG_Rest3_Rate 0x19
+#define REG_Frame_Period_Max_Bound_Lower 0x1a
+#define REG_Frame_Period_Max_Bound_Upper 0x1b
+#define REG_Frame_Period_Min_Bound_Lower 0x1c
+#define REG_Frame_Period_Min_Bound_Upper 0x1d
+#define REG_Shutter_Max_Bound_Lower 0x1e
+#define REG_Shutter_Max_Bound_Upper 0x1f
+#define REG_LASER_CTRL0 0x20
+#define REG_Observation 0x24
+#define REG_Data_Out_Lower 0x25
+#define REG_Data_Out_Upper 0x26
+#define REG_SROM_ID 0x2a
+#define REG_Lift_Detection_Thr 0x2e
+#define REG_Configuration_V 0x2f
+#define REG_Configuration_IV 0x39
+#define REG_Power_Up_Reset 0x3a
+#define REG_Shutdown 0x3b
+#define REG_Inverse_Product_ID 0x3f
+#define REG_Motion_Burst 0x50
+#define REG_SROM_Load_Burst 0x62
+#define REG_Pixel_Burst 0x64
 
 #define ADNS_CLOCK_SPEED 2000000
 #define MIN_CPI 200
 #define MAX_CPI 8200
 #define CPI_STEP 200
-#define CLAMP_CPI(value) value < MIN_CPI ? MIN_CPI : value > MAX_CPI ? MAX_CPI : value
+#define CLAMP_CPI(value) value<MIN_CPI ? MIN_CPI : value> MAX_CPI ? MAX_CPI : value
 #define SPI_MODE 3
 #define SPI_DIVISOR (F_CPU / ADNS_CLOCK_SPEED)
 #define US_BETWEEN_WRITES 120
@@ -80,23 +80,19 @@
 
 extern const uint8_t firmware_data[];
 
-void adns_spi_start(void){
-    spi_start(SPI_SS_PIN, false, SPI_MODE, SPI_DIVISOR);
-}
-
-void adns_write(uint8_t reg_addr, uint8_t data){
+void adns_spi_start(void) { spi_start(SPI_SS_PIN, false, SPI_MODE, SPI_DIVISOR); }
 
+void adns_write(uint8_t reg_addr, uint8_t data) {
     adns_spi_start();
     spi_write(reg_addr | MSB1);
     spi_write(data);
     spi_stop();
     wait_us(US_BETWEEN_WRITES);
 }
 
-uint8_t adns_read(uint8_t reg_addr){
-
+uint8_t adns_read(uint8_t reg_addr) {
     adns_spi_start();
-    spi_write(reg_addr & 0x7f );
+    spi_write(reg_addr & 0x7f);
     uint8_t data = spi_read();
     spi_stop();
     wait_us(US_BETWEEN_READS);
@@ -105,7 +101,6 @@ uint8_t adns_read(uint8_t reg_addr){
 }
 
 void adns_init() {
-
     setPinOutput(SPI_SS_PIN);
 
     spi_init();
@@ -144,7 +139,7 @@ void adns_init() {
 
     // send all bytes of the firmware
     unsigned char c;
-    for(int i = 0; i < FIRMWARE_LENGTH; i++){
+    for (int i = 0; i < FIRMWARE_LENGTH; i++) {
         c = (unsigned char)pgm_read_byte(firmware_data + i);
         spi_write(c);
         wait_us(15);
@@ -161,28 +156,25 @@ void adns_init() {
 
 config_adns_t adns_get_config(void) {
     uint8_t config_1 = adns_read(REG_Configuration_I);
-    return (config_adns_t){ (config_1 & 0xFF) * CPI_STEP };
+    return (config_adns_t){(config_1 & 0xFF) * CPI_STEP};
 }
 
 void adns_set_config(config_adns_t config) {
     uint8_t config_1 = (CLAMP_CPI(config.cpi) / CPI_STEP) & 0xFF;
     adns_write(REG_Configuration_I, config_1);
 }
 
-static int16_t convertDeltaToInt(uint8_t high, uint8_t low){
-
+static int16_t convertDeltaToInt(uint8_t high, uint8_t low) {
     // join bytes into twos compliment
     uint16_t twos_comp = (high << 8) | low;
 
     // convert twos comp to int
-    if (twos_comp & 0x8000)
-        return -1 * (~twos_comp + 1);
+    if (twos_comp & 0x8000) return -1 * (~twos_comp + 1);
 
     return twos_comp;
 }
 
 report_adns_t adns_get_report(void) {
-
     report_adns_t report = {0, 0};
 
     adns_spi_start();
@@ -194,8 +186,7 @@ report_adns_t adns_get_report(void) {
 
     uint8_t motion = spi_read();
 
-    if(motion & 0x80) {
-
+    if (motion & 0x80) {
         // clear observation register
         spi_read();
 

diff --git a/drivers/sensors/adns9800.h b/drivers/sensors/adns9800.h
@@ -28,8 +28,8 @@ typedef struct {
     int16_t y;
 } report_adns_t;
 
-void adns_init(void);
+void          adns_init(void);
 config_adns_t adns_get_config(void);
-void adns_set_config(config_adns_t);
+void          adns_set_config(config_adns_t);
 /* Reads and clears the current delta values on the ADNS sensor */
 report_adns_t adns_get_report(void);
diff --git a/drivers/sensors/pmw3360.c b/drivers/sensors/pmw3360.c
@@ -23,55 +23,55 @@
 #include "pmw3360_firmware.h"
 
 // Registers
-#define REG_Product_ID                 0x00
-#define REG_Revision_ID                0x01
-#define REG_Motion                     0x02
-#define REG_Delta_X_L                  0x03
-#define REG_Delta_X_H                  0x04
-#define REG_Delta_Y_L                  0x05
-#define REG_Delta_Y_H                  0x06
-#define REG_SQUAL                      0x07
-#define REG_Raw_Data_Sum               0x08
-#define REG_Maximum_Raw_data           0x09
-#define REG_Minimum_Raw_data           0x0A
-#define REG_Shutter_Lower              0x0B
-#define REG_Shutter_Upper              0x0C
-#define REG_Control                    0x0D
-#define REG_Config1                    0x0F
-#define REG_Config2                    0x10
-#define REG_Angle_Tune                 0x11
-#define REG_Frame_Capture              0x12
-#define REG_SROM_Enable                0x13
-#define REG_Run_Downshift              0x14
-#define REG_Rest1_Rate_Lower           0x15
-#define REG_Rest1_Rate_Upper           0x16
-#define REG_Rest1_Downshift            0x17
-#define REG_Rest2_Rate_Lower           0x18
-#define REG_Rest2_Rate_Upper           0x19
-#define REG_Rest2_Downshift            0x1A
-#define REG_Rest3_Rate_Lower           0x1B
-#define REG_Rest3_Rate_Upper           0x1C
-#define REG_Observation                0x24
-#define REG_Data_Out_Lower             0x25
-#define REG_Data_Out_Upper             0x26
-#define REG_Raw_Data_Dump              0x29
-#define REG_SROM_ID                    0x2A
-#define REG_Min_SQ_Run                 0x2B
-#define REG_Raw_Data_Threshold         0x2C
-#define REG_Config5                    0x2F
-#define REG_Power_Up_Reset             0x3A
-#define REG_Shutdown                   0x3B
-#define REG_Inverse_Product_ID         0x3F
-#define REG_LiftCutoff_Tune3           0x41
-#define REG_Angle_Snap                 0x42
-#define REG_LiftCutoff_Tune1           0x4A
-#define REG_Motion_Burst               0x50
-#define REG_LiftCutoff_Tune_Timeout    0x58
+#define REG_Product_ID 0x00
+#define REG_Revision_ID 0x01
+#define REG_Motion 0x02
+#define REG_Delta_X_L 0x03
+#define REG_Delta_X_H 0x04
+#define REG_Delta_Y_L 0x05
+#define REG_Delta_Y_H 0x06
+#define REG_SQUAL 0x07
+#define REG_Raw_Data_Sum 0x08
+#define REG_Maximum_Raw_data 0x09
+#define REG_Minimum_Raw_data 0x0A
+#define REG_Shutter_Lower 0x0B
+#define REG_Shutter_Upper 0x0C
+#define REG_Control 0x0D
+#define REG_Config1 0x0F
+#define REG_Config2 0x10
+#define REG_Angle_Tune 0x11
+#define REG_Frame_Capture 0x12
+#define REG_SROM_Enable 0x13
+#define REG_Run_Downshift 0x14
+#define REG_Rest1_Rate_Lower 0x15
+#define REG_Rest1_Rate_Upper 0x16
+#define REG_Rest1_Downshift 0x17
+#define REG_Rest2_Rate_Lower 0x18
+#define REG_Rest2_Rate_Upper 0x19
+#define REG_Rest2_Downshift 0x1A
+#define REG_Rest3_Rate_Lower 0x1B
+#define REG_Rest3_Rate_Upper 0x1C
+#define REG_Observation 0x24
+#define REG_Data_Out_Lower 0x25
+#define REG_Data_Out_Upper 0x26
+#define REG_Raw_Data_Dump 0x29
+#define REG_SROM_ID 0x2A
+#define REG_Min_SQ_Run 0x2B
+#define REG_Raw_Data_Threshold 0x2C
+#define REG_Config5 0x2F
+#define REG_Power_Up_Reset 0x3A
+#define REG_Shutdown 0x3B
+#define REG_Inverse_Product_ID 0x3F
+#define REG_LiftCutoff_Tune3 0x41
+#define REG_Angle_Snap 0x42
+#define REG_LiftCutoff_Tune1 0x4A
+#define REG_Motion_Burst 0x50
+#define REG_LiftCutoff_Tune_Timeout 0x58
 #define REG_LiftCutoff_Tune_Min_Length 0x5A
-#define REG_SROM_Load_Burst            0x62
-#define REG_Lift_Config                0x63
-#define REG_Raw_Data_Burst             0x64
-#define REG_LiftCutoff_Tune2           0x65
+#define REG_SROM_Load_Burst 0x62
+#define REG_Lift_Config 0x63
+#define REG_Raw_Data_Burst 0x64
+#define REG_LiftCutoff_Tune2 0x65
 
 bool _inBurst = false;