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Transpilation routing causes StandardRB to cheat #1279
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One note -- relabeling does not occur for the case where there is all-to-all coupling. This is always the case for two qubit RB, so the special handling there does not matter. The smallest case where this effect occurs is three qubit RB with linearly coupled qubits (for three qubits all coupled to each other it also should not occur). |
Thanks for reporting this. The root of this issue is that the Qiskit transpiler tries to optimize the layout whenever possible by relabeling qubits regardless of the presence of barriers, so we need to add an option to force the final layout to stay the same as the initial. This work is already being tracked in Qiskit/qiskit#8185. In the meantime, we'll add a note to the documentation that 3Q+ experiments cannot be guaranteed to run on the exact physical qubits specified by the user when coupling is limited. |
### Summary Make the Clifford synthesis algorithm for RB circuits pluggable (implementing it as a `HighLevelSynthesisPlugin`). Fixes #1279 and #1023. Change to accept Clifford elements consisting only of instructions supported by the backend for `interleaved_element` option in `InterleavedRB`. Speed up 2Q RB/IRB for backends with unidirectional 2q gates, e.g. IBM's 127Q Eagle processors. ### Details and comments Previously, for 3Q+ RB circuits, entire circuit is transpiled at once and hence for each of the resulting Cliffords, the initial and the final layout may differ, that means sampled Cliffords are changed during the transpilation. Also in the worst case, the resulting circuit may use physical qubits not in the supplied `physical_qubits`. To avoid that, this commit changes to transpile an RB sequence Clifford by Clifford. The Clifford synthesis algorithm (`rb_default`) is implemented as a `HighLevelSynthesisPlugin` (see `RBDefaultCliffordSynthesis` in `clifford_synthesis.py`), which forces the initial layout (i.e. guarantees the initial layout = the final layout) and physical qubits to use. As a byproduct, the performance of 2Q RB/IRB for backends with directed 2q gates (e.g. IBM's 127Q Eagle processors) is drastically improved. For those cases, previously we had to rely on `transpile` function to make generated circuits comply with the coupling map, however, after this commit, we can synthesize Cliffords with considering the 2q-gate direction and go through the fast path introduced in #982. Depends on Qiskit/qiskit#10477 (qiskit 0.45) --------- Co-authored-by: Helena Zhang <[email protected]>
Informations
What is the current behavior?
StandardRB gives inaccurate benchmarking results for greater than two qubits. The Qiskit transpiler routing stage does not respect the barrier instructions between the Clifford gates, and so SWAP gates are optimized away using
TranspileLayout
relabeling. This makes it impossible to accurately benchmark three-qubit gates usingStandardRB
, because the randomly-sampled Clifford gates are skewed toward those that involve fewer SWAP gates. (Two-qubit RBhas a custom transpilation thatseems to avoid this problem.)Steps to reproduce the problem
Run this script:
It produces the following output:
What is the expected behavior?
The Clifford gates before and after transpilation should be the same. (I would also expect
final_layout
to matchinitial_layout
).Suggested solutions
Edit the
_transpiled_circuits
method so that it decomposes each Clifford gate in a way that preserves the qubit layout.(edited for clarity)
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