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add unittest to see the code fail
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bicycle315 committed Apr 21, 2022

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tvdeyen Thomas von Deyen
1 parent 8c7d663 commit 498a879
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20 changes: 20 additions & 0 deletions test/randomized_benchmarking/test_randomized_benchmarking.py
Original file line number Diff line number Diff line change
@@ -16,6 +16,7 @@

import numpy as np
from ddt import ddt, data, unpack
from qiskit.circuit import Delay, QuantumCircuit
from qiskit.circuit.library import SXGate, CXGate, TGate, XGate
from qiskit.exceptions import QiskitError
from qiskit.providers.aer import AerSimulator
@@ -266,6 +267,25 @@ def test_expdata_serialization(self):
class TestInterleavedRB(RBTestCase):
"""Test for interleaved RB."""

def test_interleaved_element_with_delay(self):
"""Test building RB sequence interleaved with delay or circuit with delay"""
exp = rb.InterleavedRB(
interleaved_element=Delay(10, unit="us"),
qubits=[0],
lengths=[1, 2, 3],
seed=123,
num_samples=2,
)
exp.circuits()

delay_qc = QuantumCircuit(2)
delay_qc.delay(10, [0, 1], "us")

exp = rb.InterleavedRB(
interleaved_element=delay_qc, qubits=[1, 2], lengths=[1, 2, 3], seed=123, num_samples=2
)
exp.circuits()

@data([XGate(), [3], 4], [CXGate(), [4, 7], 5])
@unpack
def test_interleaved_structure(self, interleaved_element, qubits, length):

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