Feature request: Global Interrupt Controller #68
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yongbok
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This patch implements a part of the Global Interrupt Controller (GIC) included in the Multi-core Coherent Processing System. The GIC handles the distribution of interrupts between and among the CPUs in the Cluster. On a CPU with multiple VPEs, each VPE has its own set of interrupt inputs. The GIC has the ability to route interrupts to each VPE independently and generally does not know or care to which CPU a VPE belongs. I6400 core definition is updated for the GIC. Updates prplfoundation#68 Signed-off-by: Yongbok Kim <[email protected]>
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Yes! I actually start the work based on the patch set. Regards, From: James Hogan [mailto:[email protected]] This may be a useful reference: — |
yongbok
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Oct 28, 2015
Update GIC implementation using QOM. Consolidate data structure for each IRQs and VPs. The patch includes changes made during upstreaming the feature. Updates prplfoundation#68 Signed-off-by: Yongbok Kim <[email protected]>
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Global Interrupt Controller (GIC) is becoming more important in order to support the Multi-core System.
The GIC handles the distribution of interrupts between and among the CPUs in the Cluster. On a CPU with multiple VPEs, each VPE has its own set of interrupt inputs. The GIC has the ability to route interrupts to each VPE independently and generally does not know or care to which CPU a VPE belongs.
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