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Add documentation for how codegen works in the sdk #23742
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PR #23742: Size comparison from 5bec9c5 to 17f2b35 Increases (3 builds for bl602, psoc6, telink)
Decreases (4 builds for cyw30739, psoc6, telink)
Full report (40 builds for bl602, bl702, cyw30739, efr32, esp32, linux, mbed, nrfconnect, psoc6, telink)
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Looks good. Thanks for adding docs on this topic. It was difficult to collect this information before and required pinging experts on slack, which isn't scalable.
Fast-tracking documentation-only change. We can update documentation async afterwards and this does not affect SDK functionality. |
PR #23742: Size comparison from 5bec9c5 to 09d87ed Increases (15 builds for bl602, bl702, cc13x2_26x2, efr32, linux, psoc6, telink)
Decreases (7 builds for bl602, cc13x2_26x2, nrfconnect, telink)
Full report (49 builds for bl602, bl702, cc13x2_26x2, cyw30739, efr32, esp32, linux, mbed, nrfconnect, psoc6, qpg, telink)
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We use codegen a lot in chip.
This document starts describing the current status of things and I plan to update it as we develop the code generation logic.