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Cleanup
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@joajfreitas
joajfreitas committed Jul 14, 2024
1 parent 142e759 commit 9bc3855
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Showing 7 changed files with 18 additions and 67 deletions.
7 changes: 2 additions & 5 deletions fpt/src/memory/cartridge.rs
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Original file line number Diff line number Diff line change
@@ -1,6 +1,3 @@
use std::cell::RefCell;
use std::rc::Rc;

use crate::memory::map;
use crate::memory::{Address, MemoryRange};

Expand Down Expand Up @@ -34,7 +31,7 @@ pub fn convert_rom_size(rom_size: u8) -> usize {
}
}

pub fn convert_ram_size(ram_size: u8) -> u16 {
pub fn convert_ram_size(ram_size: u8) -> usize {
match ram_size {
0x00 => 0,
0x02 => 1,
Expand Down Expand Up @@ -101,7 +98,7 @@ impl Cartridge for EmptyCartridge {
}
fn write(&mut self, _address: Address, _value: u8) {}

fn read_range(&self, memory_range: MemoryRange) -> Vec<u8> {
fn read_range(&self, _memory_range: MemoryRange) -> Vec<u8> {
Vec::new()
}
}
25 changes: 0 additions & 25 deletions fpt/src/memory/memory.rs → fpt/src/memory/lib.rs
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Original file line number Diff line number Diff line change
@@ -1,5 +1,4 @@
use std::cell::{Ref, RefCell, RefMut};
use std::ops::DerefMut;
use std::ops::Range;
use std::rc::Rc;

Expand Down Expand Up @@ -125,31 +124,10 @@ impl Bus {

pub fn unload_bootrom(&mut self) {
self.memory_mut().unload_bootrom();
// TODO: unload?
//let cartridge = self.memory_mut().cartridge[map::BOOTROM].to_vec();
//self.clone_from_slice(map::BOOTROM, &cartridge);
//for i in map::BOOTROM {
// self.memory_mut().code_listing[i] = None;
//}
}

pub fn load_cartridge(&mut self, cartridge: &[u8]) {
// TODO: load
self.memory_mut().set_cartridge(create_mbc(cartridge));

//println!("title: {}", self.memory().cartridge().get_title());
//println!("code: {}", self.memory().cartridge().get_manufacturer_code());
//println!("new licensee code: {}", self.memory().cartridge().get_new_licensee_code());
//println!("cartridge type: {}", self.memory().cartridge().get_cartridge_type());
//println!("rom size: {}", self.memory().cartridge().get_rom_size());
//println!("ram size: {}", self.memory().cartridge().get_ram_size());
//println!("licensee code: {}", self.memory().cartridge().get_old_licensee_code());
//println!("version number: {}", self.memory().cartridge().get_version_number());

//panic!();
//self.memory_mut().cartridge = cartridge.to_vec();
//let l = cartridge.len();
//self.clone_from_slice(0x0100..l, &cartridge[0x0100..l]);
}

pub fn read(&self, address: Address) -> u8 {
Expand Down Expand Up @@ -197,9 +175,6 @@ impl Bus {
}

pub fn clone_from_slice(&mut self, mut range: MemoryRange, slice: &[u8]) {
dbg!(slice.len());
dbg!(&range);

if range.end > 65535 {
range.end = 65535;
}
Expand Down
20 changes: 6 additions & 14 deletions fpt/src/memory/mbc1.rs
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Original file line number Diff line number Diff line change
@@ -1,7 +1,3 @@
//write memory bank controller 1

//use crate::memory::memory_controller::MemoryController;

use super::cartridge::{convert_ram_size, convert_rom_size, get_ram_size, get_rom_size};
use super::{map, Address, Cartridge, MemoryRange};

Expand All @@ -16,24 +12,20 @@ pub struct Mbc1Cartridge {

impl Mbc1Cartridge {
pub fn new(cartridge: &[u8]) -> Mbc1Cartridge {
let rom_size = dbg!(convert_rom_size(get_rom_size(cartridge)));
let ram_size = dbg!(convert_ram_size(get_ram_size(cartridge)));
let mut rom_banks = vec![[0; 0x4000]; dbg!(rom_size as usize)];
let mut ram_banks = vec![[0; 0x2000]; dbg!(ram_size as usize)];
let rom_size = convert_rom_size(get_rom_size(cartridge));
let ram_size = convert_ram_size(get_ram_size(cartridge));
let mut rom_banks = vec![[0; 0x4000]; rom_size as usize];
let mut ram_banks = vec![[0; 0x2000]; ram_size as usize];

// TODO: wtf is this initialization
for i in 0..rom_size {
for j in 0..0x4000 {
let i = i as usize;
let j = j as usize;
rom_banks[i][j] = cartridge[0x4000 * i + j];
}
}

for i in 0..ram_size {
for j in 0..0x2000 {
let i = i as usize;
let j = j as usize;
ram_banks[i][j] = cartridge[0x2000 * i + j];
}
}
Expand All @@ -54,11 +46,11 @@ impl Cartridge for Mbc1Cartridge {
if map::EXT_RAM.contains(&address) && !self.ext_ram_enabled {
0 // TODO: check that disabled ram reads 0
} else if map::EXT_RAM.contains(&address) && self.ext_ram_enabled {
self.ram_banks[self.ram_bank_number as usize][address - map::EXT_RAM.start]
self.ram_banks[self.ram_bank_number][address - map::EXT_RAM.start]
} else if map::ROM_BANK0.contains(&address) {
self.rom_banks[0][address - map::ROM_BANK0.start]
} else if map::ROM_BANK1.contains(&address) {
self.rom_banks[self.rom_bank_number as usize][address - map::ROM_BANK1.start]
self.rom_banks[self.rom_bank_number][address - map::ROM_BANK1.start]
} else {
self.memory[address]
}
Expand Down
16 changes: 6 additions & 10 deletions fpt/src/memory/mbc3.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -12,24 +12,20 @@ pub struct Mbc3Cartridge {

impl Mbc3Cartridge {
pub fn new(cartridge: &[u8]) -> Mbc3Cartridge {
let rom_size = dbg!(convert_rom_size(get_rom_size(cartridge)));
let ram_size = dbg!(convert_ram_size(get_ram_size(cartridge)));
let mut rom_banks = vec![[0; 0x4000]; dbg!(rom_size as usize)];
let mut ram_banks = vec![[0; 0x2000]; dbg!(ram_size as usize)];
let rom_size = convert_rom_size(get_rom_size(cartridge));
let ram_size = convert_ram_size(get_ram_size(cartridge));
let mut rom_banks = vec![[0; 0x4000]; rom_size as usize];
let mut ram_banks = vec![[0; 0x2000]; ram_size as usize];

// TODO: wtf is this initialization
for i in 0..rom_size {
for j in 0..0x4000 {
let i = i as usize;
let j = j as usize;
rom_banks[i][j] = cartridge[0x4000 * i + j];
}
}

for i in 0..ram_size {
for j in 0..0x2000 {
let i = i as usize;
let j = j as usize;
ram_banks[i][j] = cartridge[0x2000 * i + j];
}
}
Expand All @@ -50,11 +46,11 @@ impl Cartridge for Mbc3Cartridge {
if map::EXT_RAM.contains(&address) && !self.ext_ram_enabled {
0 // TODO: check that disabled ram reads 0
} else if map::EXT_RAM.contains(&address) && self.ext_ram_enabled {
self.ram_banks[self.ram_bank_number as usize][address - map::EXT_RAM.start]
self.ram_banks[self.ram_bank_number][address - map::EXT_RAM.start]
} else if map::ROM_BANK0.contains(&address) {
self.rom_banks[0][address - map::ROM_BANK0.start]
} else if map::ROM_BANK1.contains(&address) {
self.rom_banks[self.rom_bank_number as usize][address - map::ROM_BANK1.start]
self.rom_banks[self.rom_bank_number][address - map::ROM_BANK1.start]
} else {
self.memory[address]
}
Expand Down
6 changes: 2 additions & 4 deletions fpt/src/memory/mbc_builder.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -12,10 +12,8 @@ pub fn create_mbc(cartridge_data: &[u8]) -> Rc<RefCell<dyn Cartridge>> {

match dbg!(cartridge_type) {
0x00 => Rc::new(RefCell::new(NoMbcCartridge::new(cartridge_data))),
0x01 | 0x02 | 0x03 => Rc::new(RefCell::new(Mbc1Cartridge::new(cartridge_data))),
0x0F | 0x10 | 0x11 | 0x12 | 0x13 => {
Rc::new(RefCell::new(Mbc3Cartridge::new(cartridge_data)))
}
0x01..0x03 => Rc::new(RefCell::new(Mbc1Cartridge::new(cartridge_data))),
0x0F..0x13 => Rc::new(RefCell::new(Mbc3Cartridge::new(cartridge_data))),
_ => panic!(),
}
}
Expand Down
6 changes: 0 additions & 6 deletions fpt/src/memory/memory_controller.rs
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This file was deleted.

5 changes: 2 additions & 3 deletions fpt/src/memory/mod.rs
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Original file line number Diff line number Diff line change
@@ -1,13 +1,12 @@
mod cartridge;
mod lib;
pub mod map;
mod mbc1;
mod mbc3;
mod mbc_builder;
mod mbc_none;
mod memory;
mod memory_controller;

pub use cartridge::Cartridge;
pub use lib::{Address, Bus, Buttons, MemoryRange};
pub use mbc_builder::{create_empty_mbc, create_mbc};
pub use mbc_none::NoMbcCartridge;
pub use memory::{Address, Bus, Buttons, MemoryRange};

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