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Simple NPU is a host compiled simulation model of a network processor with support for the P4 runtime environment.
The simple npu model proposed here only models a subset of modules and functionality implemented in actual network processors, Typically system level design in EDA starts from a high level functional model usually written in a SDL with a sufficient high level of abstraction, with timing annotation being introduced later into the model usually after functional validation of the model.
This is where the pfpsim framework comes to aid a designer by providing meaningful modelling abstractions that allow to simplify the workflow of developing a model.
- SystemC
- Transaction-Level Modelling (TLM)
- Forwarding plane
- Forwarding Architecture Description Language (FAD)
- PFPSIM Workflow
- P4
#Overview of Model SubSystems
