fixes pyrpl-fpga#505 where people were seeing divide by zero errors o…

…n initialisation
peteasa · Nov 8, 2024 · f0c96a8 · f0c96a8
1 parent e4f5aa8
commit f0c96a8
Showing 1 changed file with 6 additions and 1 deletion.
diff --git a/pyrpl/attributes.py b/pyrpl/attributes.py
@@ -787,7 +787,12 @@ def clog2(x):
                 return 32
             else:
                 return int(np.floor(np.log2(float(x))))+1
-        return clog2(125000000.0/float(self._MINBW(obj)))
+        divider = float(self._MINBW(obj))
+
+        if divider == 0:
+            return clog2(125000000.0/10) # some default value to stop error, see issue #505
+        else:
+            return clog2(125000000.0/divider)
 
     #def _ALPHABITS(self, obj):
     #    return int(np.ceil(np.log2(125000000.0 / self._MINBW(obj))))