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Update STL such that it does not error on implicit clk domain
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@VonTum
VonTum committed Jan 14, 2025
1 parent 6735b28 commit db795f9
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Showing 4 changed files with 65 additions and 36 deletions.
1 change: 1 addition & 0 deletions stl/core.sus
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Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,7 @@ __builtin__ module LatencyOffset #(T, int OFFSET) {

// Compiler Intrinsic
__builtin__ module CrossDomain #(T) {
domain in
interface in_domain : T in'0
domain out
interface out_domain : -> T out'0
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1 change: 1 addition & 0 deletions stl/util.sus
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Expand Up @@ -3,6 +3,7 @@ module DualPortMem #(T, int SIZE) {

state T[SIZE] mem

domain write
interface write : bool write, int addr, T data

if write {
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96 changes: 60 additions & 36 deletions test.sus_errors.txt
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Original file line number Diff line number Diff line change
@@ -1,92 +1,92 @@
Warning: Unused port 'ready'
╭─[util.sus:87:2]
╭─[util.sus:88:2]
│
49 │ output bool ready'0
50 │ output bool ready'0
│ ──┬──
│ ╰──── Port 'ready' declared here
│
87 │ FIFO #(DEPTH: 3, READY_SLACK: 5, T: type int) f
88 │ FIFO #(DEPTH: 3, READY_SLACK: 5, T: type int) f
│ ──────────────────────┬────────────────────── ┬
│ ╰────────────────────────── Unused port 'ready'
│ │
│ ╰── f declared here
────╯
Warning: Unused port 'push'
╭─[util.sus:87:2]
╭─[util.sus:88:2]
│
50 │ interface push : bool push'READY_SLACK, T data_in'READY_SLACK
51 │ interface push : bool push'READY_SLACK, T data_in'READY_SLACK
│ ──┬─
│ ╰─── Port 'push' declared here
│
87 │ FIFO #(DEPTH: 3, READY_SLACK: 5, T: type int) f
88 │ FIFO #(DEPTH: 3, READY_SLACK: 5, T: type int) f
│ ──────────────────────┬────────────────────── ┬
│ ╰────────────────────────── Unused port 'push'
│ │
│ ╰── f declared here
────╯
Warning: Unused port 'data_in'
╭─[util.sus:87:2]
╭─[util.sus:88:2]
│
50 │ interface push : bool push'READY_SLACK, T data_in'READY_SLACK
51 │ interface push : bool push'READY_SLACK, T data_in'READY_SLACK
│ ───┬───
│ ╰───── Port 'data_in' declared here
│
87 │ FIFO #(DEPTH: 3, READY_SLACK: 5, T: type int) f
88 │ FIFO #(DEPTH: 3, READY_SLACK: 5, T: type int) f
│ ──────────────────────┬────────────────────── ┬
│ ╰────────────────────────── Unused port 'data_in'
│ │
│ ╰── f declared here
────╯
Warning: Unused port 'pop'
╭─[util.sus:87:2]
╭─[util.sus:88:2]
│
53 │ interface pop : bool pop -> bool data_valid, T data_out
54 │ interface pop : bool pop -> bool data_valid, T data_out
│ ─┬─
│ ╰─── Port 'pop' declared here
│
87 │ FIFO #(DEPTH: 3, READY_SLACK: 5, T: type int) f
88 │ FIFO #(DEPTH: 3, READY_SLACK: 5, T: type int) f
│ ──────────────────────┬────────────────────── ┬
│ ╰────────────────────────── Unused port 'pop'
│ │
│ ╰── f declared here
────╯
Warning: Unused port 'data_valid'
╭─[util.sus:87:2]
╭─[util.sus:88:2]
│
53 │ interface pop : bool pop -> bool data_valid, T data_out
54 │ interface pop : bool pop -> bool data_valid, T data_out
│ ─────┬────
│ ╰────── Port 'data_valid' declared here
│
87 │ FIFO #(DEPTH: 3, READY_SLACK: 5, T: type int) f
88 │ FIFO #(DEPTH: 3, READY_SLACK: 5, T: type int) f
│ ──────────────────────┬────────────────────── ┬
│ ╰────────────────────────── Unused port 'data_valid'
│ │
│ ╰── f declared here
────╯
Warning: Unused port 'data_out'
╭─[util.sus:87:2]
╭─[util.sus:88:2]
│
53 │ interface pop : bool pop -> bool data_valid, T data_out
54 │ interface pop : bool pop -> bool data_valid, T data_out
│ ────┬───
│ ╰───── Port 'data_out' declared here
│
87 │ FIFO #(DEPTH: 3, READY_SLACK: 5, T: type int) f
88 │ FIFO #(DEPTH: 3, READY_SLACK: 5, T: type int) f
│ ──────────────────────┬────────────────────── ┬
│ ╰────────────────────────── Unused port 'data_out'
│ │
│ ╰── f declared here
────╯
Warning: Unused Variable: This variable does not affect the output ports of this module
╭─[util.sus:191:10]
╭─[util.sus:192:10]
│
191 │ int[20] arr
192 │ int[20] arr
│ ─┬─
│ ╰─── Unused Variable: This variable does not affect the output ports of this module
─────╯
Warning: Unused Variable: This variable does not affect the output ports of this module
╭─[util.sus:193:9]
╭─[util.sus:194:9]
│
193 │ int[5] subArr = Slice #(SIZE: 20, OUT_SIZE: 5, FROM: 3, T: type int)(arr)
194 │ int[5] subArr = Slice #(SIZE: 20, OUT_SIZE: 5, FROM: 3, T: type int)(arr)
│ ───┬──
│ ╰──── Unused Variable: This variable does not affect the output ports of this module
─────╯
Expand Down Expand Up @@ -518,6 +518,7 @@ Error: ::doNothing does not have a main interface. You should explicitly specify
431 │ module doNothing {}
│ ────┬────
│ ╰────── Module 'doNothing' defined here. module ::doNothing #():
domain clk:

│
445 │ doNothing()
Expand All @@ -537,6 +538,7 @@ Error: ::doNothing does not have a main interface. You should explicitly specify
431 │ module doNothing {}
│ ────┬────
│ ╰────── Module 'doNothing' defined here. module ::doNothing #():
domain clk:

│
601 │ doNothing()
Expand Down Expand Up @@ -623,9 +625,9 @@ Error: MIN is not a valid template argument of ::int
│ ─┬─
│ ╰─── MIN is not a valid template argument of ::int
│
├─[core.sus:28:20]
├─[core.sus:29:20]
│
28 │ __builtin__ struct int {}
29 │ __builtin__ struct int {}
│ ─┬─
│ ╰─── 'int' defined here
─────╯
Expand All @@ -636,9 +638,9 @@ Error: MAX is not a valid template argument of ::int
│ ─┬─
│ ╰─── MAX is not a valid template argument of ::int
│
├─[core.sus:28:20]
├─[core.sus:29:20]
│
28 │ __builtin__ struct int {}
29 │ __builtin__ struct int {}
│ ─┬─
│ ╰─── 'int' defined here
─────╯
Expand Down Expand Up @@ -690,6 +692,7 @@ Error: ::no_port_module does not have a main interface. You should explicitly sp
675 │ module no_port_module {}
│ ───────┬──────
│ ╰──────── Module 'no_port_module' defined here. module ::no_port_module #():
domain clk:

│
678 │ no_port_module()
Expand All @@ -702,6 +705,7 @@ Error: ::no_port_module does not have a main interface. You should explicitly sp
675 │ module no_port_module {}
│ ───────┬──────
│ ╰──────── Module 'no_port_module' defined here. module ::no_port_module #():
domain clk:

│
681 │ int x = no_port()
Expand Down Expand Up @@ -823,9 +827,9 @@ Error: beep is not a valid template argument of ::int
│ ──┬─
│ ╰─── beep is not a valid template argument of ::int
│
├─[core.sus:28:20]
├─[core.sus:29:20]
│
28 │ __builtin__ struct int {}
29 │ __builtin__ struct int {}
│ ─┬─
│ ╰─── 'int' defined here
─────╯
Expand All @@ -836,9 +840,9 @@ Error: BEEP is not a valid template argument of ::int
│ ──┬─
│ ╰─── BEEP is not a valid template argument of ::int
│
├─[core.sus:28:20]
├─[core.sus:29:20]
│
28 │ __builtin__ struct int {}
29 │ __builtin__ struct int {}
│ ─┬─
│ ╰─── 'int' defined here
─────╯
Expand All @@ -849,9 +853,9 @@ Error: ::int is not a named wire: local or constant, it is a Struct instead!
│ ─┬─
│ ╰─── ::int is not a named wire: local or constant, it is a Struct instead!
│
├─[core.sus:28:20]
├─[core.sus:29:20]
│
28 │ __builtin__ struct int {}
29 │ __builtin__ struct int {}
│ ─┬─
│ ╰─── Defined here
─────╯
Expand All @@ -869,9 +873,9 @@ Error: BITWIDTH is not a valid template argument of ::FIFO
│ ────┬───
│ ╰───── BITWIDTH is not a valid template argument of ::FIFO
│
├─[util.sus:35:8]
├─[util.sus:36:8]
│
35 │ module FIFO #(
36 │ module FIFO #(
│ ──┬─
│ ╰─── 'FIFO' defined here
─────╯
Expand Down Expand Up @@ -1121,6 +1125,7 @@ Error: ::no_main_interface does not have a main interface. You should explicitly
916 │ module no_main_interface {
│ ────────┬────────
│ ╰────────── Module 'no_main_interface' defined here. module ::no_main_interface #():
domain clk:

│
923 │ int x = no_interface_named()
Expand All @@ -1133,6 +1138,7 @@ Error: ::no_main_interface does not have a main interface. You should explicitly
916 │ module no_main_interface {
│ ────────┬────────
│ ╰────────── Module 'no_main_interface' defined here. module ::no_main_interface #():
domain clk:

│
924 │ int y = no_main_interface()
Expand Down Expand Up @@ -1217,9 +1223,9 @@ Error: ABC is not a valid template argument of ::int
│ ─┬─
│ ╰─── ABC is not a valid template argument of ::int
│
├─[core.sus:28:20]
├─[core.sus:29:20]
│
28 │ __builtin__ struct int {}
29 │ __builtin__ struct int {}
│ ─┬─
│ ╰─── 'int' defined here
─────╯
Expand Down Expand Up @@ -1293,3 +1299,21 @@ Warning: Unused Variable: This variable does not affect the output ports of this
│ ──┬──
│ ╰──── Unused Variable: This variable does not affect the output ports of this module
─────╯
Error: When using explicit domains, no port is allowed to be declared on the implicit 'clk' domain.
╭─[test.sus:1019:2]
│
1017 │ input int bad_port
│ ──────┬─────
│ ╰─────── A domain should be explicitly defined before this port
│
1019 │ domain bad_domain
│ ────────┬────────
│ ╰────────── When using explicit domains, no port is allowed to be declared on the implicit 'clk' domain.
──────╯
Warning: Unused Variable: This variable does not affect the output ports of this module
╭─[test.sus:1017:12]
│
1017 │ input int bad_port
│ ────┬───
│ ╰───── Unused Variable: This variable does not affect the output ports of this module
──────╯
3 changes: 3 additions & 0 deletions test.sus_output.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -111,6 +111,7 @@ TREE SITTER module! xyz
TREE SITTER module! numbersToAddUp
TREE SITTER module! sized_int_add
TREE SITTER module! use_sized_int_add
TREE SITTER module! implicit_domain_forbidden
Typechecking LatencyOffset
Typechecking CrossDomain
Typechecking IntToBits
Expand Down Expand Up @@ -217,6 +218,7 @@ Typechecking xyz
Typechecking numbersToAddUp
Typechecking sized_int_add
Typechecking use_sized_int_add
Typechecking implicit_domain_forbidden
Instantiating IntToBits
Concrete Typechecking IntToBits
Latency Counting IntToBits
Expand Down Expand Up @@ -541,3 +543,4 @@ Instantiating sized_int_add
Concrete Typechecking sized_int_add
Latency Counting sized_int_add
Latency Counting use_sized_int_add
Not Instantiating implicit_domain_forbidden due to flattening errors

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