Merge FlattenedModule into Module

- Create new infrastructure for iterating through mutable modules with access to all other modules -
pc2 · May 3, 2024 · a3bdaaf · a3bdaaf
1 parent be1de24
commit a3bdaaf
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Showing 12 changed files with 463 additions and 332 deletions.
diff --git a/src/codegen_fallback.rs b/src/codegen_fallback.rs
@@ -110,7 +110,7 @@ impl<'g, 'out, Stream : std::fmt::Write> CodeGenerationContext<'g, 'out, Stream>
 
         // Then output all declarations, and the wires we can already assign
         for (_id, w) in &self.instance.wires {
-            if let Instruction::Declaration(wire_decl) = &self.md.flattened.instructions[w.original_wire] {
+            if let Instruction::Declaration(wire_decl) = &self.md.instructions[w.original_wire] {
                 // Don't print named inputs and outputs, already did that in interface
                 if wire_decl.identifier_type.is_port() {
                     continue;

diff --git a/src/compiler_top.rs b/src/compiler_top.rs
@@ -5,7 +5,7 @@ use tree_sitter::Parser;
 use crate::{
     errors::ErrorCollector,
     file_position::FileText,
-    flattening::{initialization::gather_initial_file_data, typechecking::typecheck_all_modules, FlattenedModule},
+    flattening::{flatten, initialization::gather_initial_file_data, typechecking::typecheck_all_modules},
     instantiation::InstantiatedModule,
     linker::{FileData, FileUUID, Linker, ModuleUUID}
 };
@@ -48,13 +48,11 @@ pub fn recompile_all(linker : &mut Linker) {
     // Flatten all modules
     let id_vec : Vec<ModuleUUID> = linker.modules.iter().map(|(id, _)| id).collect();
     for id in id_vec {
-        let md = &linker.modules[id];// Have to get them like this, so we don't have a mutable borrow on self.modules across the loop
-        println!("Flattening {}", md.link_info.name);
-
-        let flattened = FlattenedModule::flatten(&linker, md);
+        //let md = &linker.modules[id];// Have to get them like this, so we don't have a mutable borrow on self.modules across the loop
+
+        flatten(linker, id);
 
         let md = &mut linker.modules[id]; // Convert to mutable ptr
-        md.flattened = flattened;
         md.instantiations.clear_instances();
     }
 

diff --git a/src/dev_aid/lsp.rs b/src/dev_aid/lsp.rs
@@ -302,7 +302,7 @@ fn get_info_about_source_location<'linker>(linker : &'linker Linker, position :
                 let md = &linker.modules[md_id];
                 if md.link_info.span.contains_pos(position) {
                     location_builder.update(md.link_info.name_span, LocationInfo::Global(NameElem::Module(md_id)));
-                    for (id, inst) in &md.flattened.instructions {
+                    for (id, inst) in &md.instructions {
                         match inst {
                             Instruction::SubModule(sm) => {
                                 location_builder.update(sm.module_name_span, LocationInfo::Global(NameElem::Module(sm.module_uuid)));
@@ -441,7 +441,7 @@ fn gather_completions(linker : &Linker, file_id : FileUUID, position : usize) ->
         result.push(CompletionItem{label : m.link_info.name.to_string(), kind : Some(CompletionItemKind::FUNCTION), ..Default::default()});
 
         if m.link_info.file == file_id && m.link_info.span.contains_pos(position) {
-            for (_id, v) in &m.flattened.instructions {
+            for (_id, v) in &m.instructions {
                 if let Instruction::Declaration(d) = v {
                     result.push(CompletionItem{label : d.name.to_string(), kind : Some(CompletionItemKind::VARIABLE), ..Default::default()});
                 }
@@ -472,7 +472,7 @@ fn handle_request(method : &str, params : serde_json::Value, file_cache : &mut L
                 } else {
                     match info {
                         LocationInfo::WireRef(md, decl_id) => {
-                            let decl = md.flattened.instructions[decl_id].unwrap_wire_declaration();
+                            let decl = md.instructions[decl_id].unwrap_wire_declaration();
                             let typ_str = decl.typ.to_string(&file_cache.linker.types);
                             let name_str = &decl.name;
 
@@ -514,7 +514,7 @@ fn handle_request(method : &str, params : serde_json::Value, file_cache : &mut L
                 match info {
                     LocationInfo::WireRef(md, decl_id) => {
                         let uri = file_cache.uris[md.link_info.file].clone();
-                        let decl = md.flattened.instructions[decl_id].unwrap_wire_declaration();
+                        let decl = md.instructions[decl_id].unwrap_wire_declaration();
                         let range = to_position_range(file_cache.linker.files[md.link_info.file].file_text.get_span_linecol_range(decl.name_span));
                         GotoDefinitionResponse::Scalar(Location{uri, range})
                     }

diff --git a/src/dev_aid/syntax_highlighting.rs b/src/dev_aid/syntax_highlighting.rs
@@ -30,12 +30,12 @@ pub fn walk_name_color(all_objects : &[NameElem], linker : &Linker) -> Vec<(IDEI
         let (ide_typ, link_info) = match obj_uuid {
             NameElem::Module(id) => {
                 let module = &linker.modules[*id];
-                for (_id, item) in &module.flattened.instructions {
+                for (_id, item) in &module.instructions {
                     match item {
                         Instruction::Wire(w) => {
                             match &w.source {
                                 &WireSource::WireRead(from_wire) => {
-                                    let decl = module.flattened.instructions[from_wire].unwrap_wire_declaration();
+                                    let decl = module.instructions[from_wire].unwrap_wire_declaration();
                                     result.push((IDEIdentifierType::Value(decl.identifier_type), w.span));
                                 }
                                 WireSource::UnaryOp { op:_, right:_ } => {}
@@ -61,7 +61,7 @@ pub fn walk_name_color(all_objects : &[NameElem], linker : &Linker) -> Vec<(IDEI
                         Instruction::Write(conn) => {
                             match conn.to.root {
                                 ConnectionWriteRoot::LocalDecl(decl_id) => {
-                                    let decl = module.flattened.instructions[decl_id].unwrap_wire_declaration();
+                                    let decl = module.instructions[decl_id].unwrap_wire_declaration();
                                     result.push((IDEIdentifierType::Value(decl.identifier_type), conn.to.root_span));
                                 }
                                 ConnectionWriteRoot::SubModulePort(port) => {

diff --git a/src/errors.rs b/src/errors.rs
@@ -100,4 +100,11 @@ impl ErrorCollector {
         assert!(self.file_len == source.file_len);
         self.errors.borrow_mut().extend_from_slice(&source.errors.borrow());
     }
+
+    pub fn take(&mut self) -> ErrorCollector {
+        std::mem::replace(self, self.new_for_same_file_clean_did_error())
+    }
+    pub fn is_untouched(&self) -> bool {
+        self.errors.borrow().is_empty()
+    }
 }
diff --git a/src/flattening/initialization.rs b/src/flattening/initialization.rs
@@ -3,10 +3,15 @@ use sus_proc_macro::{field, kind};
 
 
 use crate::{
-    arena_alloc::{FlatAlloc, UUIDMarker, UUIDRange, UUID}, file_position::{FileText, Span}, flattening::{FlattenedModule, Module}, instantiation::InstantiationList, linker::{FileBuilder, LinkInfo}, parser::Cursor
+    arena_alloc::{FlatAlloc, UUIDMarker, UUIDRange, UUID},
+    file_position::{FileText, Span},
+    flattening::Module,
+    instantiation::InstantiationList,
+    linker::{FileBuilder, LinkInfo, ResolvedGlobals},
+    parser::Cursor
 };
 
-use super::IdentifierType;
+use super::{FlatID, IdentifierType};
 
 
 
@@ -29,7 +34,9 @@ pub struct Port {
     pub name_span : Span,
     pub decl_span : Span,
     pub id_typ : IdentifierType,
-    pub interface : InterfaceID
+    pub interface : InterfaceID,
+    /// This is only set after flattening is done. Initially just [UUID::PLACEHOLDER]
+    pub declaration_instruction : FlatID
 }
 
 #[derive(Debug)]
@@ -75,10 +82,11 @@ pub fn gather_initial_file_data(builder : &mut FileBuilder) {
         let (kind, span) = cursor.kind_span();
         match kind {
             kind!("module") => {
-                let parsing_errors = builder.other_parsing_errors.new_for_same_file_inherit_did_error();
+                let parsing_errors = builder.other_parsing_errors.new_for_same_file_clean_did_error();
                 cursor.report_all_decendant_errors(&parsing_errors);
                 cursor.go_down_no_check(|cursor| {
                     let name_span = cursor.field_span(field!("name"), kind!("identifier"));
+                    let name = builder.file_text[name_span].to_owned();
 
                     let mut ports = FlatAlloc::new();
                     let mut interfaces = FlatAlloc::new();
@@ -88,13 +96,16 @@ pub fn gather_initial_file_data(builder : &mut FileBuilder) {
 
                     let ports_start_at = ports.get_next_alloc_id();
 
+                    println!("Allocating ports in {name}");
                     if cursor.optional_field(field!("interface_ports")) {
-                        if cursor.optional_field(field!("inputs")) {
-                            func_call_inputs = gather_decl_names_in_list(IdentifierType::Input, ModulePorts::MAIN_INTERFACE_ID, &mut ports, cursor, builder.file_text);
-                        }
-                        if cursor.optional_field(field!("outputs")) {
-                            func_call_outputs = gather_decl_names_in_list(IdentifierType::Output, ModulePorts::MAIN_INTERFACE_ID, &mut ports, cursor, builder.file_text);
-                        }
+                        cursor.go_down(kind!("interface_ports"), |cursor| {
+                            if cursor.optional_field(field!("inputs")) {
+                                func_call_inputs = gather_decl_names_in_list(IdentifierType::Input, ModulePorts::MAIN_INTERFACE_ID, &mut ports, cursor, builder.file_text);
+                            }
+                            if cursor.optional_field(field!("outputs")) {
+                                func_call_outputs = gather_decl_names_in_list(IdentifierType::Output, ModulePorts::MAIN_INTERFACE_ID, &mut ports, cursor, builder.file_text);
+                            }
+                        })
                     }
 
                     interfaces.alloc(Interface{func_call_inputs, func_call_outputs, ports_for_this_interface : ports.range_since(ports_start_at)});
@@ -103,16 +114,17 @@ pub fn gather_initial_file_data(builder : &mut FileBuilder) {
                         link_info: LinkInfo {
                             documentation: cursor.extract_gathered_comments(),
                             file: builder.file_id,
-                            name: builder.file_text[name_span].to_owned(),
+                            name,
                             name_span,
-                            span
+                            span,
+                            errors : parsing_errors,
+                            resolved_globals : ResolvedGlobals::empty()
                         },
-                        flattened: FlattenedModule::empty(parsing_errors.new_for_same_file_inherit_did_error()),
+                        instructions : FlatAlloc::new(),
                         module_ports : ModulePorts{
                             ports,
                             interfaces
                         },
-                        parsing_errors,
                         instantiations: InstantiationList::new()
                     };
 
@@ -132,7 +144,7 @@ fn gather_decl_names_in_list(id_typ: IdentifierType, interface : InterfaceID, po
             cursor.field(field!("type"));
             let name_span = cursor.field_span(field!("name"), kind!("identifier"));
             let name = file_text[name_span].to_owned();
-            ports.alloc(Port{name, name_span, decl_span, id_typ, interface})
+            ports.alloc(Port{name, name_span, decl_span, id_typ, interface, declaration_instruction : UUID::PLACEHOLDER})
         });
     });
     ports.range_since(list_start_at)