Detect SHA extensions

- Add HAVE_SHA compiler define - Add zfs_sha_available function - Detect SHA in cpu feature bits Signed-off-by: Jan Kasiak <[email protected]>
openzfs · Sep 9, 2021 · 5f165a6 · 5f165a6
1 parent ab15b1f
commit 5f165a6
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Showing 3 changed files with 49 additions and 1 deletion.
diff --git a/config/toolchain-simd.m4 b/config/toolchain-simd.m4
@@ -24,6 +24,7 @@ AC_DEFUN([ZFS_AC_CONFIG_ALWAYS_TOOLCHAIN_SIMD], [
 			ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_AES
 			ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_PCLMULQDQ
 			ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_MOVBE
+			ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_SHA
 			;;
 	esac
 ])
@@ -422,3 +423,24 @@ AC_DEFUN([ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_MOVBE], [
 		AC_MSG_RESULT([no])
 	])
 ])
+
+dnl #
+dnl # ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_SHA
+dnl #
+AC_DEFUN([ZFS_AC_CONFIG_TOOLCHAIN_CAN_BUILD_SHA], [
+	AC_MSG_CHECKING([whether host toolchain supports SHA])
+
+	AC_LINK_IFELSE([AC_LANG_SOURCE([
+	[
+		void main()
+		{
+			__asm__ __volatile__("sha1msg1 %xmm0, %xmm1");
+			__asm__ __volatile__("sha256msg1 %xmm0, %xmm1");
+		}
+	]])], [
+		AC_MSG_RESULT([yes])
+		AC_DEFINE([HAVE_SHA], 1, [Define if host toolchain supports SHA])
+	], [
+		AC_MSG_RESULT([no])
+	])
+])
diff --git a/include/os/linux/kernel/linux/simd_x86.h b/include/os/linux/kernel/linux/simd_x86.h
@@ -490,6 +490,19 @@ zfs_movbe_available(void)
 #endif
 }
 
+/*
+ * Check if SHA instruction is available
+ */
+static inline boolean_t
+zfs_sha_available(void)
+{
+#if defined(X86_FEATURE_SHA_NI)
+	return (!!boot_cpu_has(X86_FEATURE_SHA_NI));
+#else
+	return (B_FALSE);
+#endif
+}
+
 /*
  * AVX-512 family of instruction sets:
  *

diff --git a/lib/libspl/include/sys/simd.h b/lib/libspl/include/sys/simd.h
@@ -78,7 +78,8 @@ typedef enum cpuid_inst_sets {
 	AVX512VL,
 	AES,
 	PCLMULQDQ,
-	MOVBE
+	MOVBE,
+	SHA,
 } cpuid_inst_sets_t;
 
 /*
@@ -103,6 +104,7 @@ typedef struct cpuid_feature_desc {
 #define	_AES_BIT		(1U << 25)
 #define	_PCLMULQDQ_BIT		(1U << 1)
 #define	_MOVBE_BIT		(1U << 22)
+#define	_SHA_BIT		(1U << 29)
 
 /*
  * Descriptions of supported instruction sets
@@ -131,6 +133,7 @@ static const cpuid_feature_desc_t cpuid_features[] = {
 	[AES]		= {1U, 0U, _AES_BIT,		ECX	},
 	[PCLMULQDQ]	= {1U, 0U, _PCLMULQDQ_BIT,	ECX	},
 	[MOVBE]		= {1U, 0U, _MOVBE_BIT,		ECX	},
+	[SHA]		= {7U, 0U, _SHA_BIT,	EBX	},
 };
 
 /*
@@ -204,6 +207,7 @@ CPUID_FEATURE_CHECK(avx512vl, AVX512VL);
 CPUID_FEATURE_CHECK(aes, AES);
 CPUID_FEATURE_CHECK(pclmulqdq, PCLMULQDQ);
 CPUID_FEATURE_CHECK(movbe, MOVBE);
+CPUID_FEATURE_CHECK(sha, SHA);
 
 /*
  * Detect register set support
@@ -345,6 +349,15 @@ zfs_movbe_available(void)
 	return (__cpuid_has_movbe());
 }
 
+/*
+ * Check if SHA instruction is available
+ */
+static inline boolean_t
+zfs_sha_available(void)
+{
+	return (__cpuid_has_sha());
+}
+
 /*
  * AVX-512 family of instruction sets:
  *