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Fix tests and deadlock
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zlangley committed Jan 3, 2025
1 parent cc90a2e commit 3faaaf0
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Showing 5 changed files with 9 additions and 14 deletions.
1 change: 0 additions & 1 deletion crates/vm/src/arch/vm.rs
Original file line number Diff line number Diff line change
Expand Up @@ -233,7 +233,6 @@ where
let mut segments = self.execute_segments(exe, input)?;
let final_memory = mem::take(&mut segments.last_mut().unwrap().final_memory);

#[allow(unused_variables)]
Ok(VmExecutorResult {
per_segment: segments
.into_iter()
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7 changes: 2 additions & 5 deletions extensions/keccak256/circuit/src/trace.rs
Original file line number Diff line number Diff line change
Expand Up @@ -38,6 +38,7 @@ where
let total_num_blocks: usize = records.iter().map(|r| r.input_blocks.len()).sum();
let mut states = Vec::with_capacity(total_num_blocks);
let mut instruction_blocks = Vec::with_capacity(total_num_blocks);
let memory = self.offline_memory.lock().unwrap();

#[derive(Clone)]
struct StateDiff {
Expand Down Expand Up @@ -65,7 +66,6 @@ where
// prepare the states
let mut state: [u64; 25];
for record in records {
let memory = self.offline_memory.lock().unwrap();
let dst_read = memory.record_by_id(record.dst_read);
let src_read = memory.record_by_id(record.src_read);
let len_read = memory.record_by_id(record.len_read);
Expand Down Expand Up @@ -145,16 +145,13 @@ where
// Resize with dummy `is_enabled = 0`
instruction_blocks.resize(num_blocks, Default::default());

let offline_memory = self.offline_memory.lock().unwrap();
let aux_cols_factory = offline_memory.aux_cols_factory();
let aux_cols_factory = memory.aux_cols_factory();

// Use unsafe alignment so we can parallely write to the matrix
let mut trace =
RowMajorMatrix::new(Val::<SC>::zero_vec(num_rows * trace_width), trace_width);
let limb_shift_bits = RV32_CELL_BITS * RV32_REGISTER_NUM_LIMBS - self.air.ptr_max_bits;

let memory = self.offline_memory.lock().unwrap();

trace
.values
.par_chunks_mut(trace_width * NUM_ROUNDS)
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8 changes: 4 additions & 4 deletions extensions/native/circuit/src/castf/tests.rs
Original file line number Diff line number Diff line change
Expand Up @@ -96,7 +96,7 @@ fn negative_castf_overflow_test() {
let mut rng = create_seeded_rng();
let y = generate_uint_number(&mut rng);
prepare_castf_rand_write_execute(&mut tester, &mut chip, y, &mut rng);
drop(tester);
tester.build();

let mut chip_input = chip.generate_air_proof_input();
let trace = chip_input.raw.common_main.as_mut().unwrap();
Expand Down Expand Up @@ -134,7 +134,7 @@ fn negative_castf_memread_test() {
let mut rng = create_seeded_rng();
let y = generate_uint_number(&mut rng);
prepare_castf_rand_write_execute(&mut tester, &mut chip, y, &mut rng);
drop(tester);
tester.build();

let mut chip_input = chip.generate_air_proof_input();
let trace = chip_input.raw.common_main.as_mut().unwrap();
Expand Down Expand Up @@ -172,7 +172,7 @@ fn negative_castf_memwrite_test() {
let mut rng = create_seeded_rng();
let y = generate_uint_number(&mut rng);
prepare_castf_rand_write_execute(&mut tester, &mut chip, y, &mut rng);
drop(tester);
tester.build();

let mut chip_input = chip.generate_air_proof_input();
let trace = chip_input.raw.common_main.as_mut().unwrap();
Expand Down Expand Up @@ -210,7 +210,7 @@ fn negative_castf_as_test() {
let mut rng = create_seeded_rng();
let y = generate_uint_number(&mut rng);
prepare_castf_rand_write_execute(&mut tester, &mut chip, y, &mut rng);
drop(tester);
tester.build();

let mut chip_input = chip.generate_air_proof_input();
let trace = chip_input.raw.common_main.as_mut().unwrap();
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1 change: 1 addition & 0 deletions extensions/native/circuit/src/field_arithmetic/tests.rs
Original file line number Diff line number Diff line change
Expand Up @@ -140,6 +140,7 @@ fn new_field_arithmetic_air_zero_div_zero() {
[5, 6, 7, 1, 1, 1],
),
);
tester.build();

let mut chip_input = chip.generate_air_proof_input();
// set the value of [c]_f to zero, necessary to bypass trace gen checks
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6 changes: 2 additions & 4 deletions extensions/native/circuit/src/fri/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -446,7 +446,7 @@ impl<F: PrimeField32> FriReducedOpeningChip<F> {
record: FriReducedOpeningRecord<F>,
aux_cols_factory: &MemoryAuxColsFactory<F>,
slice: &mut [F],
memory: &Arc<Mutex<OfflineMemory<F>>>,
memory: &OfflineMemory<F>,
) {
let width = FriReducedOpeningCols::<F>::width();

Expand All @@ -461,8 +461,6 @@ impl<F: PrimeField32> FriReducedOpeningChip<F> {
..
} = record.instruction;

let memory = memory.lock().unwrap();

let length_read = memory.record_by_id(record.length_read);
let alpha_read = memory.record_by_id(record.alpha_read);
let a_ptr_read = memory.record_by_id(record.a_ptr_read);
Expand Down Expand Up @@ -560,7 +558,7 @@ impl<F: PrimeField32> FriReducedOpeningChip<F> {
record,
&aux_cols_factory,
&mut flat_trace[idx..idx + (length * width)],
&self.offline_memory,
&memory,
);
idx += length * width;
}
Expand Down

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