Merge pull request #1014 from rosethompson/main

Removes ahbsdc submodule
openhwgroup · Oct 15, 2024 · de8083b · de8083b
2 parents 55ca2c8 + 8fb1673
commit de8083b
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diff --git a/.gitmodules b/.gitmodules
@@ -20,14 +20,11 @@
 	branch = dev
 [submodule "addins/branch-predictor-simulator"]
 	path = addins/branch-predictor-simulator
-	url = https://github.com/ross144/branch-predictor-simulator
-[submodule "addins/ahbsdc"]
-	path = addins/ahbsdc
-	url = https://github.com/JacobPease/ahbsdc.git
+	url = https://github.com/rosethompson/branch-predictor-simulator
 [submodule "addins/verilog-ethernet"]
 	sparseCheckout = true
 	path = addins/verilog-ethernet
-	url = https://github.com/ross144/verilog-ethernet.git
+	url = https://github.com/rosethompson/verilog-ethernet.git
 [submodule "cvw-arch-verif"]
 	path = addins/cvw-arch-verif
 	url = https://github.com/openhwgroup/cvw-arch-verif

diff --git a/addins/ahbsdc b/addins/ahbsdc
diff --git a/bin/CModelBTBAccuracy.sh b/bin/CModelBTBAccuracy.sh
@@ -1,7 +1,7 @@
 #!/bin/bash
 
 ###########################################
-## Written: [email protected]
+## Written: [email protected]
 ## Created: 23 October 2023
 ## Modified: 
 ##

diff --git a/bin/CModelBranchAccuracy.sh b/bin/CModelBranchAccuracy.sh
@@ -1,7 +1,7 @@
 #!/bin/bash
 
 ###########################################
-## Written: [email protected]
+## Written: [email protected]
 ## Created: 12 March 2023
 ## Modified: 
 ##

diff --git a/bin/SeparateBranch.sh b/bin/SeparateBranch.sh
@@ -1,7 +1,7 @@
 #!/bin/bash
 
 ###########################################
-## Written: [email protected]
+## Written: [email protected]
 ## Created: 12 March 2023
 ## Modified: 
 ##

diff --git a/bin/extractFunctionRadix.sh b/bin/extractFunctionRadix.sh
@@ -4,7 +4,7 @@
 ## extractFunctionRadix.sh
 ##
 ## Written: Rose Thompson
-## email: [email protected]
+## email: [email protected]
 ## Created: March 1, 2021
 ## Modified: March 10, 2021
 ##

diff --git a/bin/parseHPMC.py b/bin/parseHPMC.py
@@ -1,7 +1,7 @@
 #!/usr/bin/env python3
 
 ###########################################
-## Written: Rose Thompson [email protected]
+## Written: Rose Thompson [email protected]
 ## Created: 20 September 2023
 ## Modified: 
 ##

diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh
@@ -2,7 +2,7 @@
 ###########################################
 ## Tool chain install script.
 ##
-## Written: Rose Thompson [email protected]
+## Written: Rose Thompson [email protected]
 ## Created: 18 January 2023
 ## Modified: 22 January 2023
 ## Modified: 23 March 2023

diff --git a/fpga/generator/wally.tcl b/fpga/generator/wally.tcl
@@ -47,7 +47,7 @@ if {$board=="ArtyA7"} {
 # read in all other rtl
 add_files [glob -type f  ../src/CopiedFiles_do_not_add_to_repo/*/*.sv ../src/CopiedFiles_do_not_add_to_repo/*/*/*.sv]
 
-set_property include_dirs {../src/CopiedFiles_do_not_add_to_repo/config ../../config/shared ../../addins/ahbsdc/sdc} [current_fileset]
+set_property include_dirs {../src/CopiedFiles_do_not_add_to_repo/config ../../config/shared} [current_fileset]
 
 
 # define top level

diff --git a/fpga/rvvidaemon/rvvidaemon.c b/fpga/rvvidaemon/rvvidaemon.c
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // rvvi daemon
 //
-// Written: Rose Thomposn [email protected]
+// Written: Rose Thomposn [email protected]
 // Created: 31 May 2024
 // Modified: 31 May 2024
 //

diff --git a/fpga/src/fpgaTop.sv b/fpga/src/fpgaTop.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // fpgaTop.sv
 //
-// Written: [email protected] November 17, 2021
+// Written: [email protected] November 17, 2021
 // Modified: 
 //
 // Purpose: This is a top level for the fpga's implementation of wally.

diff --git a/fpga/src/fpgaTopArtyA7.sv b/fpga/src/fpgaTopArtyA7.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // fpgaTop.sv
 //
-// Written: [email protected] November 17, 2021
+// Written: [email protected] November 17, 2021
 // Modified: 
 //
 // Purpose: This is a top level for the fpga's implementation of wally.

diff --git a/fpga/src/wallypipelinedsocwrapper.sv b/fpga/src/wallypipelinedsocwrapper.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // wallypipelinedsocwrapper.sv
 //
-// Written: Rose Thompson [email protected] 16 June 2023
+// Written: Rose Thompson [email protected] 16 June 2023
 // Modified: 
 //
 // Purpose: A wrapper to set parameters.  Vivado cannot set the top level parameters because it only supports verilog,

diff --git a/src/cache/cache.sv b/src/cache/cache.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // cache.sv
 //
-// Written: Rose Thompson [email protected]
+// Written: Rose Thompson [email protected]
 // Created: 7 July 2021
 // Modified: 20 January 2023
 //

diff --git a/src/cache/cacheLRU.sv b/src/cache/cacheLRU.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // cacheLRU.sv
 //
-// Written: Rose Thompson [email protected]
+// Written: Rose Thompson [email protected]
 // Created: 20 July 2021
 // Modified: 20 January 2023
 //

diff --git a/src/cache/cachefsm.sv b/src/cache/cachefsm.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // cachefsm.sv
 //
-// Written: Rose Thompson [email protected]
+// Written: Rose Thompson [email protected]
 // Created: 25 August 2021
 // Modified: 20 January 2023
 //

diff --git a/src/cache/cacheway.sv b/src/cache/cacheway.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // cacheway
 //
-// Written: Rose Thompson [email protected] 
+// Written: Rose Thompson [email protected] 
 // Created: 7 July 2021
 // Modified: 20 January 2023
 //

diff --git a/src/cache/subcachelineread.sv b/src/cache/subcachelineread.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // subcachelineread.sv
 //
-// Written: Rose Thompson [email protected]
+// Written: Rose Thompson [email protected]
 // Created: 4 February 2022
 // Modified: 20 January 2023
 //

diff --git a/src/ebu/ahbcacheinterface.sv b/src/ebu/ahbcacheinterface.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // ahbcacheinterface.sv
 //
-// Written: Rose Thompson [email protected]
+// Written: Rose Thompson [email protected]
 // Created: August 29, 2022
 // Modified: 18 January 2023
 //

diff --git a/src/ebu/ahbinterface.sv b/src/ebu/ahbinterface.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // ahbinterface.sv
 //
-// Written: Rose Thompson [email protected]
+// Written: Rose Thompson [email protected]
 // Created: August 29, 2022
 // Modified: 18 January 2023
 //

diff --git a/src/ebu/buscachefsm.sv b/src/ebu/buscachefsm.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // busfsm.sv
 //
-// Written: Rose Thompson [email protected] 
+// Written: Rose Thompson [email protected] 
 // Created: December 29, 2021
 // Modified: 18 January 2023 
 //

diff --git a/src/ebu/busfsm.sv b/src/ebu/busfsm.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // busfsm.sv
 //
-// Written: Rose Thompson [email protected]
+// Written: Rose Thompson [email protected]
 // Created: December 29, 2021
 // Modified: 18 January 2023
 //

diff --git a/src/ebu/controllerinput.sv b/src/ebu/controllerinput.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // controllerinput.sv
 //
-// Written: Rose Thompson [email protected]
+// Written: Rose Thompson [email protected]
 // Created:  August 31, 2022
 // Modified: 18 January 2023
 //

diff --git a/src/ebu/ebu.sv b/src/ebu/ebu.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // abhmulticontroller
 //
-// Written: Rose Thompson [email protected]
+// Written: Rose Thompson [email protected]
 // Created: August 29, 2022
 // Modified: 18 January 2023
 //

diff --git a/src/ebu/ebufsmarb.sv b/src/ebu/ebufsmarb.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // ebufsmarb.sv
 //
-// Written: Rose Thompson [email protected]
+// Written: Rose Thompson [email protected]
 // Created: 23 January 2023
 // Modified: 23 January 2023
 //

diff --git a/src/generic/arrs.sv b/src/generic/arrs.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // arrs.sv
 //
-// Written: Rose Thompson [email protected]
+// Written: Rose Thompson [email protected]
 // Modified: November 12, 2021
 //
 // Purpose: resets are typically asynchronous but need to be synchronized to

diff --git a/src/generic/binencoder.sv b/src/generic/binencoder.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // binencoder.sv
 //
-// Written: [email protected] November 14, 2022
+// Written: [email protected] November 14, 2022
 //
 // Purpose: one-hot to binary encoding.
 //

diff --git a/src/generic/mem/ram1p1rwbe.sv b/src/generic/mem/ram1p1rwbe.sv
@@ -2,7 +2,7 @@
 // ram1p1r2be.sv
 // 1 port sram with byte enables
 //
-// Written: [email protected]
+// Written: [email protected]
 // Created: 3 May 2021
 // Modified: 20 January 2023
 //

diff --git a/src/generic/mem/ram1p1rwe.sv b/src/generic/mem/ram1p1rwe.sv
@@ -2,7 +2,7 @@
 // ram1p1rwe.sv
 // 1 port sram.
 //
-// Written: [email protected] (Modified from ram1p1rwbe, by [email protected])
+// Written: [email protected] (Modified from ram1p1rwbe, by [email protected])
 // Created: 04 April 2023
 //
 // Purpose: ram1p1wre, but without byte-enable. Used for icache data.

diff --git a/src/generic/mem/ram2p1r1wbe.sv b/src/generic/mem/ram2p1r1wbe.sv
@@ -2,7 +2,7 @@
 // ram2p1r1wbe.sv
 // 2 port sram.
 //
-// Written: [email protected] May 3, 2021
+// Written: [email protected] May 3, 2021
 //          Two port SRAM 1 read port and 1 write port.
 //          When clk rises Addr and LineWriteData are sampled.
 //          Following the clk edge read data is output from the sampled Addr.

diff --git a/src/generic/onehotdecoder.sv b/src/generic/onehotdecoder.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // onehotdecoder.sv
 //
-// Written: [email protected] July 09, 2021
+// Written: [email protected] July 09, 2021
 // Modified: 
 //
 // Purpose: Bin to one hot decoder. Power of 2 only.

diff --git a/src/ifu/bpred/RASPredictor.sv b/src/ifu/bpred/RASPredictor.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // RASPredictor.sv
 //
-// Written: Rose Thomposn [email protected]
+// Written: Rose Thomposn [email protected]
 // Created: 15 February 2021
 // Modified: 25 January 2023
 //

diff --git a/src/ifu/bpred/bpred.sv b/src/ifu/bpred/bpred.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // bpred.sv
 //
-// Written: Rose Thomposn [email protected]
+// Written: Rose Thomposn [email protected]
 // Created: 12 February 2021
 // Modified: 19 January 2023
 //

diff --git a/src/ifu/bpred/btb.sv b/src/ifu/bpred/btb.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // btb.sv
 //
-// Written: Rose Thompson [email protected]
+// Written: Rose Thompson [email protected]
 // Created: February 15, 2021
 // Modified: 24 January 2023 
 //

diff --git a/src/ifu/bpred/gshare.sv b/src/ifu/bpred/gshare.sv
@@ -2,7 +2,7 @@
 // gshare.sv
 //
 // Written: Rose Thompson
-// Email: [email protected]
+// Email: [email protected]
 // Created: 16 March 2021
 // Adapted from [email protected] (Shreya Sanghai)
 // Modified: 20 February 2023

diff --git a/src/ifu/bpred/gsharebasic.sv b/src/ifu/bpred/gsharebasic.sv
@@ -2,7 +2,7 @@
 // gsharebasic.sv
 //
 // Written: Rose Thompson
-// Email: [email protected]
+// Email: [email protected]
 // Created: 16 March 2021
 // Adapted from [email protected] (Shreya Sanghai) global history predictor implementation.
 // Modified: 20 February 2023 

diff --git a/src/ifu/bpred/icpred.sv b/src/ifu/bpred/icpred.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // icpred.sv
 //
-// Written: Rose Thomposn [email protected]
+// Written: Rose Thomposn [email protected]
 // Created: February 26, 2023
 // Modified: February 26, 2023
 //

diff --git a/src/ifu/bpred/localaheadbp.sv b/src/ifu/bpred/localaheadbp.sv
@@ -2,7 +2,7 @@
 // localaheadbp
 //
 // Written: Rose Thompson
-// Email: [email protected]
+// Email: [email protected]
 // Created: 16 March 2021
 //
 // Purpose: local history branch predictor with ahead pipelining and SRAM memories.

diff --git a/src/ifu/bpred/localbpbasic.sv b/src/ifu/bpred/localbpbasic.sv
@@ -2,7 +2,7 @@
 // localbpbasic
 //
 // Written: Rose Thompson
-// Email: [email protected]
+// Email: [email protected]
 // Created: 16 March 2021
 //
 // Purpose: Local history branch predictor. Basic implementation without any repair and flop memories.

diff --git a/src/ifu/bpred/localrepairbp.sv b/src/ifu/bpred/localrepairbp.sv
@@ -2,7 +2,7 @@
 // localrepairbp
 //
 // Written: Rose Thompson
-// Email: [email protected]
+// Email: [email protected]
 // Created: 15 April 2023
 //
 // Purpose: Local history branch predictor with speculation and repair using CBH.

diff --git a/src/ifu/bpred/satCounter2.sv b/src/ifu/bpred/satCounter2.sv
@@ -2,7 +2,7 @@
 // satCounter2.sv
 //
 // Written: Rose Thomposn
-// Email: [email protected]
+// Email: [email protected]
 // Created: February 13, 2021
 // Modified: 
 //

diff --git a/src/ifu/bpred/twoBitPredictor.sv b/src/ifu/bpred/twoBitPredictor.sv
@@ -2,7 +2,7 @@
 // twoBitPredictor.sv
 //
 // Written: Rose Thomposn
-// Email: [email protected]
+// Email: [email protected]
 // Created: February 14, 2021
 // Modified: 
 //

diff --git a/src/ifu/irom.sv b/src/ifu/irom.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // irom.sv
 //
-// Written: Rose Thompson [email protected]
+// Written: Rose Thompson [email protected]
 // Created: 30 January 2022
 // Modified: 18 January 2023
 //

diff --git a/src/ifu/spill.sv b/src/ifu/spill.sv
@@ -1,7 +1,7 @@
 ///////////////////////////////////////////
 // spill.sv
 //
-// Written: Rose Thompson [email protected]
+// Written: Rose Thompson [email protected]
 // Created: 28 January 2022
 // Modified: 19 January 2023
 //