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Add parameter to disable software interrupt. Fix issue #2500 #2711
Add parameter to disable software interrupt. Fix issue #2500 #2711
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✔️ successful run, report available here. |
Co-authored-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>
Co-authored-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>
Co-authored-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>
Co-authored-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>
core/csr_regfile.sv
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mask = CVA6Cfg.XLEN'(riscv::MIP_MTIP) // same shift as MTIE | ||
| CVA6Cfg.XLEN'(riscv::MIP_MEIP); // same shift as MEIE |
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[verible-verilog-format] reported by reviewdog 🐶
mask = CVA6Cfg.XLEN'(riscv::MIP_MTIP) // same shift as MTIE | |
| CVA6Cfg.XLEN'(riscv::MIP_MEIP); // same shift as MEIE | |
mask = CVA6Cfg.XLEN'(riscv::MIP_MTIP) // same shift as MTIE | |
| CVA6Cfg.XLEN'(riscv::MIP_MEIP); // same shift as MEIE |
core/include/config_pkg.sv
Outdated
bit RVS; //Supervisor mode | ||
bit RVU; //User mode |
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[verible-verilog-format] reported by reviewdog 🐶
bit RVS; //Supervisor mode | |
bit RVU; //User mode | |
bit RVS; //Supervisor mode | |
bit RVU; //User mode |
core/include/config_pkg.sv
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// Support for disabling MIP.MSIP and MIE.MSIE in Hypervisor and Supervisor mode is not supported | ||
// Software Interrupt can be disabled when there is only M machine mode in CVA6. | ||
assert (!(Cfg.RVS && !Cfg.SoftwareInterruptEn)) | ||
assert (!(Cfg.RVH && !Cfg.SoftwareInterruptEn)) | ||
else $fatal(1, "[frontend] fetch width != not supported"); |
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[verible-verilog-format] reported by reviewdog 🐶
// Support for disabling MIP.MSIP and MIE.MSIE in Hypervisor and Supervisor mode is not supported | |
// Software Interrupt can be disabled when there is only M machine mode in CVA6. | |
assert (!(Cfg.RVS && !Cfg.SoftwareInterruptEn)) | |
assert (!(Cfg.RVH && !Cfg.SoftwareInterruptEn)) | |
else $fatal(1, "[frontend] fetch width != not supported"); | |
// Support for disabling MIP.MSIP and MIE.MSIE in Hypervisor and Supervisor mode is not supported | |
// Software Interrupt can be disabled when there is only M machine mode in CVA6. | |
assert (!(Cfg.RVS && !Cfg.SoftwareInterruptEn)) | |
assert (!(Cfg.RVH && !Cfg.SoftwareInterruptEn)) | |
else $fatal(1, "[frontend] fetch width != not supported"); |
core/include/config_pkg.sv
Outdated
bit RVS; //Supervisor mode | ||
bit RVU; //User mode |
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Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
[verible-verilog-format] reported by reviewdog 🐶
bit RVS; //Supervisor mode | |
bit RVU; //User mode | |
bit RVS; //Supervisor mode | |
bit RVU; //User mode |
core/include/config_pkg.sv
Outdated
// Support for disabling MIP.MSIP and MIE.MSIE in Hypervisor and Supervisor mode is not supported | ||
// Software Interrupt can be disabled when there is only M machine mode in CVA6. | ||
assert (!(Cfg.RVS && !Cfg.SoftwareInterruptEn)) | ||
assert (!(Cfg.RVH && !Cfg.SoftwareInterruptEn)) | ||
else $fatal(1, "[frontend] fetch width != not supported"); |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
[verible-verilog-format] reported by reviewdog 🐶
// Support for disabling MIP.MSIP and MIE.MSIE in Hypervisor and Supervisor mode is not supported | |
// Software Interrupt can be disabled when there is only M machine mode in CVA6. | |
assert (!(Cfg.RVS && !Cfg.SoftwareInterruptEn)) | |
assert (!(Cfg.RVH && !Cfg.SoftwareInterruptEn)) | |
else $fatal(1, "[frontend] fetch width != not supported"); | |
// Support for disabling MIP.MSIP and MIE.MSIE in Hypervisor and Supervisor mode is not supported | |
// Software Interrupt can be disabled when there is only M machine mode in CVA6. | |
assert (!(Cfg.RVS && !Cfg.SoftwareInterruptEn)) | |
assert (!(Cfg.RVH && !Cfg.SoftwareInterruptEn)) | |
else $fatal(1, "[frontend] fetch width != not supported"); |
core/include/config_pkg.sv
Outdated
// Support for disabling MIP.MSIP and MIE.MSIE in Hypervisor and Supervisor mode is not supported | ||
// Software Interrupt can be disabled when there is only M machine mode in CVA6. | ||
assert (!(Cfg.RVS && !Cfg.SoftwareInterruptEn)) | ||
assert (!(Cfg.RVH && !Cfg.SoftwareInterruptEn)) | ||
else $fatal(1, "[frontend] fetch width != not supported"); |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
[verible-verilog-format] reported by reviewdog 🐶
// Support for disabling MIP.MSIP and MIE.MSIE in Hypervisor and Supervisor mode is not supported | |
// Software Interrupt can be disabled when there is only M machine mode in CVA6. | |
assert (!(Cfg.RVS && !Cfg.SoftwareInterruptEn)) | |
assert (!(Cfg.RVH && !Cfg.SoftwareInterruptEn)) | |
else $fatal(1, "[frontend] fetch width != not supported"); | |
// Support for disabling MIP.MSIP and MIE.MSIE in Hypervisor and Supervisor mode is not supported | |
// Software Interrupt can be disabled when there is only M machine mode in CVA6. | |
assert (!(Cfg.RVS && !Cfg.SoftwareInterruptEn)) | |
assert (!(Cfg.RVH && !Cfg.SoftwareInterruptEn)) | |
else $fatal(1, "[frontend] fetch width != not supported"); |
Fix issue #2500
Add parameter to disable software interrupt.
MIP.MSIP and MIE.MSIE are now read only when this parameter is disabled.