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Add parameter to disable software interrupt. Fix issue #2500 #2711

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Gchauvon
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Fix issue #2500

Add parameter to disable software interrupt.
MIP.MSIP and MIE.MSIE are now read only when this parameter is disabled.

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✔️ successful run, report available here.

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JeanRochCoulon and others added 4 commits January 16, 2025 23:07
Co-authored-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>
Co-authored-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>
Co-authored-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>
Co-authored-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>
Comment on lines 1443 to 1444
mask = CVA6Cfg.XLEN'(riscv::MIP_MTIP) // same shift as MTIE
| CVA6Cfg.XLEN'(riscv::MIP_MEIP); // same shift as MEIE
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[verible-verilog-format] reported by reviewdog 🐶

Suggested change
mask = CVA6Cfg.XLEN'(riscv::MIP_MTIP) // same shift as MTIE
| CVA6Cfg.XLEN'(riscv::MIP_MEIP); // same shift as MEIE
mask = CVA6Cfg.XLEN'(riscv::MIP_MTIP) // same shift as MTIE
| CVA6Cfg.XLEN'(riscv::MIP_MEIP); // same shift as MEIE

Comment on lines 282 to 283
bit RVS; //Supervisor mode
bit RVU; //User mode
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[verible-verilog-format] reported by reviewdog 🐶

Suggested change
bit RVS; //Supervisor mode
bit RVU; //User mode
bit RVS; //Supervisor mode
bit RVU; //User mode

Comment on lines 394 to 398
// Support for disabling MIP.MSIP and MIE.MSIE in Hypervisor and Supervisor mode is not supported
// Software Interrupt can be disabled when there is only M machine mode in CVA6.
assert (!(Cfg.RVS && !Cfg.SoftwareInterruptEn))
assert (!(Cfg.RVH && !Cfg.SoftwareInterruptEn))
else $fatal(1, "[frontend] fetch width != not supported");
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[verible-verilog-format] reported by reviewdog 🐶

Suggested change
// Support for disabling MIP.MSIP and MIE.MSIE in Hypervisor and Supervisor mode is not supported
// Software Interrupt can be disabled when there is only M machine mode in CVA6.
assert (!(Cfg.RVS && !Cfg.SoftwareInterruptEn))
assert (!(Cfg.RVH && !Cfg.SoftwareInterruptEn))
else $fatal(1, "[frontend] fetch width != not supported");
// Support for disabling MIP.MSIP and MIE.MSIE in Hypervisor and Supervisor mode is not supported
// Software Interrupt can be disabled when there is only M machine mode in CVA6.
assert (!(Cfg.RVS && !Cfg.SoftwareInterruptEn))
assert (!(Cfg.RVH && !Cfg.SoftwareInterruptEn))
else $fatal(1, "[frontend] fetch width != not supported");

Comment on lines 282 to 283
bit RVS; //Supervisor mode
bit RVU; //User mode
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[verible-verilog-format] reported by reviewdog 🐶

Suggested change
bit RVS; //Supervisor mode
bit RVU; //User mode
bit RVS; //Supervisor mode
bit RVU; //User mode

Comment on lines 394 to 398
// Support for disabling MIP.MSIP and MIE.MSIE in Hypervisor and Supervisor mode is not supported
// Software Interrupt can be disabled when there is only M machine mode in CVA6.
assert (!(Cfg.RVS && !Cfg.SoftwareInterruptEn))
assert (!(Cfg.RVH && !Cfg.SoftwareInterruptEn))
else $fatal(1, "[frontend] fetch width != not supported");
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[verible-verilog-format] reported by reviewdog 🐶

Suggested change
// Support for disabling MIP.MSIP and MIE.MSIE in Hypervisor and Supervisor mode is not supported
// Software Interrupt can be disabled when there is only M machine mode in CVA6.
assert (!(Cfg.RVS && !Cfg.SoftwareInterruptEn))
assert (!(Cfg.RVH && !Cfg.SoftwareInterruptEn))
else $fatal(1, "[frontend] fetch width != not supported");
// Support for disabling MIP.MSIP and MIE.MSIE in Hypervisor and Supervisor mode is not supported
// Software Interrupt can be disabled when there is only M machine mode in CVA6.
assert (!(Cfg.RVS && !Cfg.SoftwareInterruptEn))
assert (!(Cfg.RVH && !Cfg.SoftwareInterruptEn))
else $fatal(1, "[frontend] fetch width != not supported");

Comment on lines 394 to 398
// Support for disabling MIP.MSIP and MIE.MSIE in Hypervisor and Supervisor mode is not supported
// Software Interrupt can be disabled when there is only M machine mode in CVA6.
assert (!(Cfg.RVS && !Cfg.SoftwareInterruptEn))
assert (!(Cfg.RVH && !Cfg.SoftwareInterruptEn))
else $fatal(1, "[frontend] fetch width != not supported");
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Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

[verible-verilog-format] reported by reviewdog 🐶

Suggested change
// Support for disabling MIP.MSIP and MIE.MSIE in Hypervisor and Supervisor mode is not supported
// Software Interrupt can be disabled when there is only M machine mode in CVA6.
assert (!(Cfg.RVS && !Cfg.SoftwareInterruptEn))
assert (!(Cfg.RVH && !Cfg.SoftwareInterruptEn))
else $fatal(1, "[frontend] fetch width != not supported");
// Support for disabling MIP.MSIP and MIE.MSIE in Hypervisor and Supervisor mode is not supported
// Software Interrupt can be disabled when there is only M machine mode in CVA6.
assert (!(Cfg.RVS && !Cfg.SoftwareInterruptEn))
assert (!(Cfg.RVH && !Cfg.SoftwareInterruptEn))
else $fatal(1, "[frontend] fetch width != not supported");

@JeanRochCoulon JeanRochCoulon merged commit 41c2206 into openhwgroup:master Jan 16, 2025
4 of 12 checks passed
@JeanRochCoulon JeanRochCoulon deleted the dev/msip-msie branch January 16, 2025 22:10
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2 participants