Skip to content

Commit

Permalink
RVFI: Add logic to detect external interrupt on mip_q
Browse files Browse the repository at this point in the history
  • Loading branch information
Gchauvon committed Jan 16, 2025
1 parent 0194e2b commit 2ef28ed
Show file tree
Hide file tree
Showing 2 changed files with 3 additions and 0 deletions.
1 change: 1 addition & 0 deletions core/cva6.sv
Original file line number Diff line number Diff line change
Expand Up @@ -1731,6 +1731,7 @@ module cva6
.wdata_i (wdata_commit_id),

.csr_i(rvfi_csr),
.irq_i(irq_i),

.rvfi_probes_o(rvfi_probes_o)

Expand Down
2 changes: 2 additions & 0 deletions core/cva6_rvfi_probes.sv
Original file line number Diff line number Diff line change
Expand Up @@ -51,6 +51,7 @@ module cva6_rvfi_probes
input logic [CVA6Cfg.NrCommitPorts-1:0][CVA6Cfg.XLEN-1:0] wdata_i,

input rvfi_probes_csr_t csr_i,
input logic [1:0] irq_i,

output rvfi_probes_t rvfi_probes_o
);
Expand Down Expand Up @@ -109,6 +110,7 @@ module cva6_rvfi_probes
instr.wdata = wdata_i;

csr = csr_i;
csr.mip_q = csr_i.mip_q | ({{CVA6Cfg.XLEN - 1{1'b0}}, CVA6Cfg.RVS && irq_i[1]} << riscv::IRQ_S_EXT);

end

Expand Down

0 comments on commit 2ef28ed

Please sign in to comment.