Implemented DM_REGION #768
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Accesses to the DM_REGION while in debug mode gets the following attriutes: - main = 1 - bufferable = 0 - cacheable = 0 - no atomics allowed - no integrity Signed-off-by: Oystein Knauserud <[email protected]>
Signed-off-by: Oystein Knauserud <[email protected]>
silabs-oysteink
added
the
Component:RTL
rtl/cv32e40x_pma.sv
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| parameter bit A_EXT = 0, | ||
| parameter int PMA_NUM_REGIONS = 0, | ||
| parameter pma_cfg_t PMA_CFG[PMA_NUM_REGIONS-1:0] = '{default:PMA_R_DEFAULT} | ||
| ) | ||
| ( | ||
| input logic [31:0] trans_addr_i, | ||
| input logic trans_debug_region_i, // Transaction address is inside the debug redion |
rtl/cv32e40x_pma.sv
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| @@ -55,6 +65,13 @@ module cv32e40x_pma import cv32e40x_pkg::*; | |||
| // PMA is deconfigured | |||
| assign pma_cfg = NO_PMA_R_DEFAULT; | |||
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| always_comb begin | |||
| // When core is in debug mode, use PMA_DBG as attributes for the DM range | |||
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When core is in debug mode, -> Debug mode transactions within the Debug Module region
| always_comb begin | ||
| // When core is in debug mode, use PMA_DBG as attributes for the DM range | ||
| if (trans_debug_region_i) begin | ||
| pma_cfg = PMA_DBG; |
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Multiple assignment together with line 66
rtl/cv32e40x_pma.sv
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| (word_addr[31:PMA_ADDR_LSB] < PMA_CFG[i].word_addr_high[31:PMA_ADDR_LSB])) begin | ||
| pma_cfg = PMA_CFG[i]; | ||
| end | ||
| end | ||
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| // When core is in debug mode, use PMA_DBG as attributes for the DM range |
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When core is in debug mode, -> Debug mode transactions within the Debug Module region
sva/cv32e40x_mpu_sva.sv
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| @@ -216,7 +228,9 @@ module cv32e40x_mpu_sva import cv32e40x_pkg::*; import uvm_pkg::*; | |||
| always_comb begin | |||
| pma_expected_cfg = NO_PMA_R_DEFAULT; | |||
| if (PMA_NUM_REGIONS) begin | |||
| pma_expected_cfg = is_pma_matched ? PMA_CFG[pma_lowest_match] : PMA_R_DEFAULT; | |||
| pma_expected_cfg = is_pma_matched ? PMA_CFG[pma_lowest_match] : | |||
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Debug mode access within Debug Module region should be highest priority
sva/cv32e40x_mpu_sva.sv
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| (!is_addr_match && was_obi_waiting && $past(obi_req)) || | ||
| // or we get an address match, but was already outputting the same address (no pma_err) | ||
| // but a change in debug mode causes the new transaction the same address to fail | ||
| (is_addr_match && was_obi_waiting && $past(obi_req) && (pma_dbg != obi_dbg))) |
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"but a change in debug mode causes the new transaction the same address to fail" this comment does not seem to correspond to any logical requirement we have. Please make the check and comment more specific so that it corresponds to logical requirements (this just looks like a 'fix' to a failing assertion).
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Updated assertion to be a bit stronger (!pma_dbg && obi_dbg) as discussed. The scenario may happen in the prefetcher when exiting debug mode while there are outstanding transactions waiting for instr_gnt_i.
Signed-off-by: Oystein Knauserud <[email protected]>
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