Removed POINTER_FETCH state from controller_fsm #696
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…a status bit (flop). Mrets which spawn a CLIC pointer fetch will not retire until the pointe reaches WB (last_op=0 when the mret itself reaches WB). Updated RVFI to enable signaling completion of the mret when the pointer reaches WB. Signed-off-by: Oystein Knauserud <[email protected]>
…LIC pointer reaches WB (last_op == 1). Signed-off-by: Oystein Knauserud <[email protected]>
…nning SEC. Signed-off-by: Oystein Knauserud <[email protected]>
silabs-oysteink
added
the
Component:RTL
Merged
Restructured the csr_save unique case and updated comments and signal names for clarity. Signed-off-by: Oystein Knauserud <[email protected]>
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SEC clean updates pushed. |
Signed-off-by: Oystein Knauserud <[email protected]>
Signed-off-by: Oystein Knauserud <[email protected]>
Silabs-ArjanB
requested changes
Nov 10, 2022
rtl/cv32e40x_controller_fsm.sv
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| // Set flag to avoid further jumps to the same target | ||
| // if we are stalled | ||
| branch_taken_n = 1'b1; | ||
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| // Clear flag for halting IF in case of single stepping |
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Add comment that flag was cleared too early because last_op_if_i information is not accurate (and gets corrected only in ID) for an mret that causes a CLIC pointer fetch.
bhv/cv32e40x_rvfi.sv
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| @@ -681,6 +687,11 @@ module cv32e40x_rvfi | |||
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| rvfi_obi_instr_t obi_instr_if; | |||
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| // Detect mret initiated CLIC pointer in WB | |||
| logic mret_clic_pointer_wb; | |||
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mret_clic_pointer_wb -> mret_clic_ptr_wb
Removed flushing of EX and WB when an mret which restarts pointer fetches is in ID. An mret can now be killed at any stage, and if it restarted a pointer fetch the 'sequence_in_progress_wb' will block interrupts and debug until the pointer arrives in WB. Signed-off-by: Oystein Knauserud <[email protected]>
…progress_is. SEC clean Signed-off-by: Oystein Knauserud <[email protected]>
Silabs-ArjanB
requested changes
Nov 11, 2022
rtl/cv32e40x_controller_fsm.sv
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| end | ||
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| // CLIC/mret pointer in ID clears pointer fetch flag | ||
| if ((clic_ptr_in_id || mret_ptr_in_id) && id_valid_i && ex_ready_i) begin |
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mret_ptr_in_id should not affect clic_ptr_in_progress_id(_clear) I think
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Agreed, removing mret_ptr_in_id is also SEC clean (no mret should be in the pipeline at all when clic_ptr_in_id is 1)
Added assertions related to clic pointers and decoder deassertion and that ID stage can never be killed when a clic pointer is in progress as seen from the ID stage. Signed-off-by: Oystein Knauserud <[email protected]>
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Updated according to latest feedback, SEC clean for both ZC_EXT=0 and ZC_EXT=1. |
Silabs-ArjanB
approved these changes
Nov 14, 2022
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POINTER_FETCH fsm state replaced by a separate state flop. Controller stays in FUNCTIONAL while handling CLIC SHV interrupts.
Mret which restarts CLIC pointer fetch due to mcause.minhv and mcause.mpp will now get its 'last_op' bit set to 0 in the ID stage, and the following CLIC pointer will complete the sequence. CSR updates only happen when the pointer reaches WB.
NOT SEC clean