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Merge pull request #790 from silabs-oysteink/silabs-oysteink-mintstat…
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…us-addr

Relocated mintstatus CSR to address 0xFB1 according to latest CLIC spec.
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Silabs-ArjanB authored Feb 21, 2023
2 parents c0800cb + 3806ad3 commit f9deefb
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Showing 2 changed files with 2 additions and 2 deletions.
2 changes: 1 addition & 1 deletion rtl/include/cv32e40x_pkg.sv
Original file line number Diff line number Diff line change
Expand Up @@ -423,7 +423,7 @@ typedef enum logic[11:0] {
CSR_MIMPID = 12'hF13,
CSR_MHARTID = 12'hF14,
CSR_MCONFIGPTR = 12'hF15,
CSR_MINTSTATUS = 12'hF46
CSR_MINTSTATUS = 12'hFB1

} csr_num_e;

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2 changes: 1 addition & 1 deletion yaml/csr.yaml.m4
Original file line number Diff line number Diff line change
Expand Up @@ -4388,7 +4388,7 @@ ifelse(eval(CLIC != 0), 1, [[[
- csr: mintstatus
description: >
Machine interrupt status
address: 0xF46
address: 0xFB1
privilege_mode: M
rv32:
- field_name: MIL
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