cpu: conv: fix 3d binary post-ops

oneapi-src · Apr 3, 2023 · e6b93af · e6b93af
1 parent 928065b
commit e6b93af
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Showing 2 changed files with 9 additions and 2 deletions.
diff --git a/src/cpu/gemm_convolution.cpp b/src/cpu/gemm_convolution.cpp
@@ -1,5 +1,5 @@
 /*******************************************************************************
-* Copyright 2016-2021 Intel Corporation
+* Copyright 2016-2023 Intel Corporation
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
@@ -203,7 +203,10 @@ status_t gemm_convolution_fwd_t::execute_forward_thr_nspc(const exec_ctx_t &ctx,
                                 args.dst_md = pd()->dst_md();
 
                                 for (size_t oc = start_oc; oc <= end_oc; oc++) {
-                                    args.l_offset = (g * jcp.oc + oc) * jcp.os;
+                                    // jcp.od is not part of jcp.os, so multiply
+                                    // jcp.od to get spatial offset.
+                                    args.l_offset = (g * jcp.oc + oc)
+                                            * (jcp.os * jcp.od);
                                     post_ops_->execute(dst_arr[oc], args);
                                 }
                             }

diff --git a/tests/benchdnn/inputs/matmul/harness_matmul_regression_f32 b/tests/benchdnn/inputs/matmul/harness_matmul_regression_f32
@@ -6,3 +6,7 @@
 
 --stag=ba --wtag=ab --dtag=ab
 13x262144:262144x1:13x1_n"long_acc_chain"
+
+--stag=axb --dtag=axb
+--skip-imp=brg,jit:avx,ref # test gemm convolutions
+--attr-post-ops=add:f32:per_oc,prelu:per_oc g4ic16id5oc16od5kd3pd1n"3d_conv:grouped_gemm_conv"