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fix up arm
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seiko2plus committed Nov 13, 2021
1 parent 20ba6ee commit 7e7913d
Showing 1 changed file with 6 additions and 6 deletions.
12 changes: 6 additions & 6 deletions numpy/core/src/common/simd/neon/memory.h
Original file line number Diff line number Diff line change
Expand Up @@ -339,18 +339,18 @@ NPYV_IMPL_NEON_REST_PARTIAL_TYPES(f64, s64)
// that contains 32 elements of float32.
NPY_FINLINE npyv_f32 npyv_lut32_f32(const float *table, npyv_u32 idx)
{
const unsigned i0 = vst1q_lane_u32(idx, 0);
const unsigned i1 = vst1q_lane_u32(idx, 1);
const unsigned i2 = vst1q_lane_u32(idx, 2);
const unsigned i3 = vst1q_lane_u32(idx, 3);
const unsigned i0 = vgetq_lane_u32(idx, 0);
const unsigned i1 = vgetq_lane_u32(idx, 1);
const unsigned i2 = vgetq_lane_u32(idx, 2);
const unsigned i3 = vgetq_lane_u32(idx, 3);
return npyv_set_f32(table[i0], table[i1], table[i2], table[i3]);
}
// uses vector as indexes into a table
// that contains 16 elements of float64.
NPY_FINLINE npyv_f64 npyv_lut16_f64(const double *table, npyv_u64 idx)
{
const unsigned i0 = vst1q_lane_u32(vreinterpretq_u32_u64(idx), 0);
const unsigned i1 = vst1q_lane_u32(vreinterpretq_u32_u64(idx), 1);
const unsigned i0 = vgetq_lane_u32(vreinterpretq_u32_u64(idx), 0);
const unsigned i1 = vgetq_lane_u32(vreinterpretq_u32_u64(idx), 1);
return npyv_set_f64(table[i0], table[i1]);
}
#endif // _NPY_SIMD_NEON_MEMORY_H

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