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[nrf fromlist] Cherry-pick updated upstream commit related to MSPI driver for EXMIF #2394

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Dec 18, 2024
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2 changes: 1 addition & 1 deletion boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts
Original file line number Diff line number Diff line change
Expand Up @@ -269,7 +269,7 @@ ipc0: &cpuapp_cpurad_ipc {

mx25uw63: mx25uw6345g@0 {
compatible = "jedec,mspi-nor";
status = "okay";
status = "disabled";
reg = <0>;
jedec-id = [c2 84 37];
sfdp-bfp = [
Expand Down
2 changes: 1 addition & 1 deletion boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280_cpuapp.dts
Original file line number Diff line number Diff line change
Expand Up @@ -260,7 +260,7 @@ ipc0: &cpuapp_cpurad_ipc {

mx25uw63: mx25uw6345g@0 {
compatible = "jedec,mspi-nor";
status = "okay";
status = "disabled";
reg = <0>;
jedec-id = [c2 84 37];
sfdp-bfp = [
Expand Down
3 changes: 2 additions & 1 deletion drivers/pinctrl/pinctrl_nrf.c
Original file line number Diff line number Diff line change
Expand Up @@ -374,8 +374,9 @@
input = NRF_GPIO_PIN_INPUT_CONNECT;
break;
#endif /* DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_can) */
#if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_exmif)
#if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_exmif) || \
DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_exmif_spi)
/* Pin routing is controlled by secure domain, via UICR */

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drivers/pinctrl/pinctrl_nrf.c:379 -#if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_exmif) || \ - DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_exmif_spi) +#if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_exmif) || DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_exmif_spi)
case NRF_FUN_EXMIF_CK:
case NRF_FUN_EXMIF_DQ0:
case NRF_FUN_EXMIF_DQ1:
Expand Down
32 changes: 31 additions & 1 deletion drivers/spi/spi_dw.c
Original file line number Diff line number Diff line change
Expand Up @@ -41,6 +41,14 @@
#include <zephyr/drivers/pinctrl.h>
#endif

#ifdef CONFIG_HAS_NRFX
#include <nrfx.h>
#endif

#ifdef CONFIG_SOC_NRF54H20_GPD
#include <nrf/gpd.h>
#endif

static inline bool spi_dw_is_slave(struct spi_dw_data *spi)
{
return (IS_ENABLED(CONFIG_SPI_SLAVE) &&
Expand Down Expand Up @@ -258,6 +266,7 @@
/* Baud rate and Slave select, for master only */
write_baudr(dev, SPI_DW_CLK_DIVIDER(info->clock_frequency,
config->frequency));
write_ser(dev, BIT(config->slave));
}

if (spi_dw_is_slave(spi)) {
Expand Down Expand Up @@ -500,6 +509,10 @@
uint32_t int_status;
int error;

#ifdef CONFIG_HAS_NRFX
NRF_EXMIF->EVENTS_CORE = 0;
#endif

int_status = read_isr(dev);

LOG_DBG("SPI %p int_status 0x%x - (tx: %d, rx: %d)", dev, int_status,
Expand Down Expand Up @@ -548,6 +561,18 @@

DEVICE_MMIO_MAP(dev, K_MEM_CACHE_NONE);

#ifdef CONFIG_HAS_NRFX
NRF_EXMIF->INTENSET = BIT(0);
NRF_EXMIF->TASKS_START = 1;

#ifdef CONFIG_SOC_NRF54H20_GPD
err = nrf_gpd_request(NRF_GPD_FAST_ACTIVE1);
if (err < 0) {
return err;
}
#endif
#endif

info->config_func();

/* Masking interrupt and making sure controller is disabled */
Expand All @@ -566,6 +591,11 @@
return 0;
}

#define REG_ADDR(inst) \
COND_CODE_1(DT_NODE_HAS_COMPAT(DT_DRV_INST(inst), nordic_nrf_exmif_spi), \
(Z_DEVICE_MMIO_NAMED_ROM_INITIALIZER(core, DT_DRV_INST(inst))), \
(DEVICE_MMIO_ROM_INIT(DT_DRV_INST(inst))))

Check notice on line 597 in drivers/spi/spi_dw.c

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drivers/spi/spi_dw.c:597 -#define REG_ADDR(inst) \ - COND_CODE_1(DT_NODE_HAS_COMPAT(DT_DRV_INST(inst), nordic_nrf_exmif_spi), \ - (Z_DEVICE_MMIO_NAMED_ROM_INITIALIZER(core, DT_DRV_INST(inst))), \ +#define REG_ADDR(inst) \ + COND_CODE_1(DT_NODE_HAS_COMPAT(DT_DRV_INST(inst), nordic_nrf_exmif_spi), \ + (Z_DEVICE_MMIO_NAMED_ROM_INITIALIZER(core, DT_DRV_INST(inst))), \

#define SPI_CFG_IRQS_SINGLE_ERR_LINE(inst) \
IRQ_CONNECT(DT_INST_IRQ_BY_NAME(inst, rx_avail, irq), \
DT_INST_IRQ_BY_NAME(inst, rx_avail, priority), \
Expand Down Expand Up @@ -638,7 +668,7 @@
SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(inst), ctx) \
}; \
static const struct spi_dw_config spi_dw_config_##inst = { \
DEVICE_MMIO_ROM_INIT(DT_DRV_INST(inst)), \
REG_ADDR(inst), \
.clock_frequency = COND_CODE_1( \
DT_NODE_HAS_PROP(DT_INST_PHANDLE(inst, clocks), clock_frequency), \
(DT_INST_PROP_BY_PHANDLE(inst, clocks, clock_frequency)), \
Expand Down Expand Up @@ -668,5 +698,5 @@
POST_KERNEL, \
CONFIG_SPI_INIT_PRIORITY, \
&dw_spi_api);

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drivers/spi/spi_dw.c:701 -#define SPI_DW_INIT(inst) \ - IF_ENABLED(CONFIG_PINCTRL, (PINCTRL_DT_INST_DEFINE(inst);)) \ - SPI_DW_IRQ_HANDLER(inst); \ - static struct spi_dw_data spi_dw_data_##inst = { \ - SPI_CONTEXT_INIT_LOCK(spi_dw_data_##inst, ctx), \ - SPI_CONTEXT_INIT_SYNC(spi_dw_data_##inst, ctx), \ - SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(inst), ctx) \ - }; \ - static const struct spi_dw_config spi_dw_config_##inst = { \ - REG_ADDR(inst), \ - .clock_frequency = COND_CODE_1( \ - DT_NODE_HAS_PROP(DT_INST_PHANDLE(inst, clocks), clock_frequency), \ - (DT_INST_PROP_BY_PHANDLE(inst, clocks, clock_frequency)), \ - (DT_INST_PROP(inst, clock_frequency))), \ - .config_func = spi_dw_irq_config_##inst, \ - .serial_target = DT_INST_PROP(inst, serial_target), \ - .fifo_depth = DT_INST_PROP(inst, fifo_depth), \ - .max_xfer_size = DT_INST_PROP(inst, max_xfer_size), \ - IF_ENABLED(CONFIG_PINCTRL, (.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst),)) \ - COND_CODE_1(DT_INST_PROP(inst, aux_reg), \ - (.read_func = aux_reg_read, \ - .write_func = aux_reg_write, \ - .set_bit_func = aux_reg_set_bit, \ - .clear_bit_func = aux_reg_clear_bit, \ - .test_bit_func = aux_reg_test_bit,), \ - (.read_func = reg_read, \ - .write_func = reg_write, \ - .set_bit_func = reg_set_bit, \ - .clear_bit_func = reg_clear_bit, \ - .test_bit_func = reg_test_bit,)) \ - }; \ - DEVICE_DT_INST_DEFINE(inst, \ - spi_dw_init, \ - NULL, \ - &spi_dw_data_##inst, \ - &spi_dw_config_##inst, \ - POST_KERNEL, \ - CONFIG_SPI_INIT_PRIORITY, \ - &dw_spi_api); +#define SPI_DW_INIT(inst) \ + IF_ENABLED(CONFIG_PINCTRL, (PINCTRL_DT_INST_DEFINE(inst);)) \ + SPI_DW_IRQ_HANDLER(inst); \ + static struct spi_dw_data spi_dw_data_##inst = { \ + SPI_CONTEXT_INIT_LOCK(spi_dw_data_##inst, ctx), \ + SPI_CONTEXT_INIT_SYNC(spi_dw_data_##inst, ctx), \ + SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(inst), ctx)}; \ + static const struct spi_dw_config spi_dw_config_##inst = { \ + REG_ADDR(inst), \ + .clock_frequency = COND_CODE_1( \ + DT_NODE_HAS_PROP(DT_INST_PHANDLE(inst, clocks), clock_frequency), \
DT_INST_FOREACH_STATUS_OKAY(SPI_DW_INIT)
8 changes: 8 additions & 0 deletions dts/bindings/spi/nordic,nrf-exmif-spi.yaml
Original file line number Diff line number Diff line change
@@ -0,0 +1,8 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0

description: Nordic External Memory Interface (EXMIF) used in SPI mode only

compatible: "nordic,nrf-exmif-spi"

include: snps,designware-spi.yaml
Original file line number Diff line number Diff line change
@@ -0,0 +1,9 @@
/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/

&mx25uw63 {
status = "okay";
};
Original file line number Diff line number Diff line change
@@ -0,0 +1,9 @@
/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/

&mx25uw63 {
status = "okay";
};
4 changes: 1 addition & 3 deletions samples/drivers/spi_flash/sample.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -8,9 +8,7 @@ tests:
filter: dt_compat_enabled("jedec,spi-nor") or dt_compat_enabled("st,stm32-qspi-nor")
or dt_compat_enabled("st,stm32-ospi-nor") or dt_compat_enabled("st,stm32-xspi-nor")
or dt_compat_enabled("nordic,qspi-nor") or dt_compat_enabled("jedec,mspi-nor")
platform_exclude:
- hifive_unmatched/fu740/s7
- hifive_unmatched/fu740/u74
platform_exclude: hifive_unmatched
harness: console
harness_config:
type: multi_line
Expand Down
Original file line number Diff line number Diff line change
@@ -0,0 +1,9 @@
/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/

&mx25uw63 {
status = "okay";
};
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