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EXMIF support in NCS #1682

Merged
merged 8 commits into from
May 9, 2024
Merged

EXMIF support in NCS #1682

merged 8 commits into from
May 9, 2024

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e-rk
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@e-rk e-rk commented May 6, 2024

Note: Contains one [noup] commit.

e-rk added 8 commits May 9, 2024 09:31
The Synopsys Designware SPI peripheral exists in two versions with
slightly different register layouts. Added a Kconfig option that makes the
driver compatible with the HSSI register layout.

Signed-off-by: Rafał Kuźnia <[email protected]>
(cherry picked from commit 8ec1e0c)
Signed-off-by: Rafał Kuźnia <[email protected]>
Added EXMIP pinctrl definitions, which allow selecting pin functions by
name in DTS. The definitions are added, but not used in pinctrl_nrf.c.

The nrf-regtool reads the pinctrl configuration and applies the settings
using different mechanisms.

Signed-off-by: Rafał Kuźnia <[email protected]>
(cherry picked from commit 45d827a)
Signed-off-by: Rafał Kuźnia <[email protected]>
The nRF54H20 implements a variant of the SPI DW peripheral that
has slightly different register layout. Enable it in the defconfig.

Signed-off-by: Rafał Kuźnia <[email protected]>
(cherry picked from commit fe98eb7)
Signed-off-by: Rafał Kuźnia <[email protected]>
Added EXMIF peripheral DTS description and bindings.
The peripheral operates as an SPI device.

Signed-off-by: Rafał Kuźnia <[email protected]>
(cherry picked from commit 4d30ccb)
Signed-off-by: Rafał Kuźnia <[email protected]>
The nRF54H20dk has mx25uw6345g flash device on board. Added DTS
description and pinctrl configuration.

The flash device node is disabled by default. The flash device needs to
be powered-on using the nRF Connect for Desktop Board Configurator
application.

Signed-off-by: Rafał Kuźnia <[email protected]>
(cherry picked from commit e9c6990)
Signed-off-by: Rafał Kuźnia <[email protected]>
Configure the sample for nRF54H20 CPUAPP.

Signed-off-by: Rafał Kuźnia <[email protected]>
(cherry picked from commit b1de9a6)
Signed-off-by: Rafał Kuźnia <[email protected]>
The Synopsys Designware SPI peripheral core is wrapped in hardware that
manages interrupts, power and clock. The SPI core registers are shifted
by 0x500 bytes.
Before the SPI core is used, the power and clock must be enabled by
writing to EXMIF.TASKS_START register.
Interrupts must be enabled by writing to EXMIF.INTENSET/INTENCLR
registers.

The SER register must be configured unconditionally during peripheral
setup. Otherwise, the serial transaction does not complete.

Signed-off-by: Rafał Kuźnia <[email protected]>
The nRF54H20 EXMIF peripheral requires word accesses. Doing accesses of
byte or half-word sizes results in bus fault.

Upstream PR: zephyrproject-rtos/zephyr#72497

Signed-off-by: Rafał Kuźnia <[email protected]>
@carlescufi carlescufi merged commit 046e281 into nrfconnect:main May 9, 2024
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4 participants