feat: Add Brillig opcode to introduce custom non-determinism to ACVM

.github/workflows/publish.yml

@@ -29,6 +29,12 @@ jobs:
         env:
           CARGO_REGISTRY_TOKEN: ${{ secrets.ACVM_CRATES_IO_TOKEN }}
 
+      - name: Publish brillig_vm
+        run: |
+          cargo publish --package brillig_vm
+        env:
+          CARGO_REGISTRY_TOKEN: ${{ secrets.ACVM_CRATES_IO_TOKEN }}
+
       - name: Publish acir
         run: |
           cargo publish --package acir
@@ -46,4 +52,3 @@ jobs:
           cargo publish --package acvm
         env:
           CARGO_REGISTRY_TOKEN: ${{ secrets.ACVM_CRATES_IO_TOKEN }}
-

Cargo.toml

@@ -1,6 +1,6 @@
 [workspace]
 
-members = ["acir_field", "acir", "acvm", "stdlib"]
+members = ["acir_field", "acir", "acvm", "stdlib", "brillig_vm"]
 
 [workspace.package]
 authors = ["The Noir Team <[email protected]>"]

acir/Cargo.toml

@@ -12,6 +12,7 @@ rust-version.workspace = true
 [dependencies]
 acir_field.workspace = true
 serde.workspace = true
+brillig_vm = { version = "0.1.0", path = "../brillig_vm", default-features = false }
 thiserror.workspace = true
 
 rmp-serde = "1.1.0"
@@ -24,5 +25,5 @@ strum_macros = "0.24"
 
 [features]
 default = ["bn254"]
-bn254 = ["acir_field/bn254"]
-bls12_381 = ["acir_field/bls12_381"]
+bn254 = ["acir_field/bn254", "brillig_vm/bn254"]
+bls12_381 = ["acir_field/bls12_381", "brillig_vm/bls12_381"]

acir/src/circuit/brillig.rs

@@ -0,0 +1,30 @@
+use crate::native_types::{Expression, Witness};
+use brillig_vm::ForeignCallResult;
+use serde::{Deserialize, Serialize};
+
+/// Inputs for the Brillig VM. These are the initial inputs
+/// that the Brillig VM will use to start.
+#[derive(Clone, PartialEq, Eq, Serialize, Deserialize, Debug)]
+pub enum BrilligInputs {
+    Single(Expression),
+    Array(Vec<Expression>),
+}
+
+/// Outputs for the Brillig VM. Once the VM has completed
+/// execution, this will be the object that is returned.
+#[derive(Clone, PartialEq, Eq, Serialize, Deserialize, Debug)]
+pub enum BrilligOutputs {
+    Simple(Witness),
+    Array(Vec<Witness>),
+}
+
+#[derive(Clone, PartialEq, Eq, Serialize, Deserialize, Debug)]
+pub struct Brillig {
+    pub inputs: Vec<BrilligInputs>,
+    pub outputs: Vec<BrilligOutputs>,
+    /// Results of oracles/functions external to brillig like a database read
+    pub foreign_call_results: Vec<ForeignCallResult>,
+    pub bytecode: Vec<brillig_vm::Opcode>,
+    /// Predicate of the Brillig execution - indicates if it should be skipped
+    pub predicate: Option<Expression>,
+}

acir/src/circuit/mod.rs

@@ -1,4 +1,5 @@
 pub mod black_box_functions;
+pub mod brillig;
 pub mod directives;
 pub mod opcodes;
 

acir/src/circuit/opcodes.rs

@@ -1,6 +1,8 @@
-use super::directives::{Directive, LogInfo, QuotientDirective};
+use super::{
+    brillig::Brillig,
+    directives::{Directive, LogInfo, QuotientDirective},
+};
 use crate::native_types::Expression;
-
 use serde::{Deserialize, Serialize};
 
 mod black_box_function_call;
@@ -31,6 +33,7 @@ pub enum Opcode {
     /// RAM is required for Aztec Backend as dynamic memory implementation in Barrentenberg requires an intialisation phase and can only handle constant values for operations.
     RAM(MemoryBlock),
     Oracle(OracleData),
+    Brillig(Brillig),
 }
 
 impl Opcode {
@@ -45,6 +48,7 @@ impl Opcode {
             Opcode::RAM(_) => "ram",
             Opcode::ROM(_) => "rom",
             Opcode::Oracle(data) => &data.name,
+            Opcode::Brillig(_) => "brillig",
         }
     }
 
@@ -145,6 +149,12 @@ impl std::fmt::Display for Opcode {
                 write!(f, "ORACLE: ")?;
                 write!(f, "{data}")
             }
+            Opcode::Brillig(brillig) => {
+                write!(f, "BRILLIG: ")?;
+                writeln!(f, "inputs: {:?}", brillig.inputs)?;
+                writeln!(f, "outputs: {:?}", brillig.outputs)?;
+                writeln!(f, "{:?}", brillig.bytecode)
+            }
         }
     }
 }

acir/src/lib.rs

@@ -8,4 +8,5 @@ pub mod native_types;
 
 pub use acir_field;
 pub use acir_field::FieldElement;
+pub use brillig_vm;
 pub use circuit::black_box_functions::BlackBoxFunc;

acvm/src/compiler/transformers/fallback.rs

@@ -54,6 +54,9 @@ impl FallbackTransformer {
                             acir_supported_opcodes.extend(opcodes_fallback);
                         }
                     }
+                    Opcode::Brillig(_) => unreachable!(
+                        "Brillig is not required by the backend and so there is nothing to support"
+                    ),
                 }
             }
         }