[Bouffalolab] Adjust BL702L memory layout to let hardware SHA engine …

…use RAM as cache (project-chip#29755)

examples/platform/bouffalolab/bl702l/ldscripts/psram_flash_rom.ld

@@ -4,18 +4,19 @@ ENTRY( bl702_start )
 
 __EM_SIZE = DEFINED(btble_controller_init) ? 16K : 0K;
 __CACHE_SIZE = DEFINED(__CACHE_SIZE) ? __CACHE_SIZE : 16K;
+__stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
 
 MEMORY
 {
   flash  (rxai!w) : ORIGIN = 0x23000000, LENGTH = (2M)
-  tcm_ocram (wxa) : ORIGIN = 0x4201C000 + __CACHE_SIZE, LENGTH = (16K - __CACHE_SIZE + 80K - __EM_SIZE)
+  tcm_ocram (wxa) : ORIGIN = 0x4201C000 + __CACHE_SIZE, LENGTH = (16K - __CACHE_SIZE + 80K - __EM_SIZE - __stack_size)
+  sys_stack (wxa) : ORIGIN = 0x42034000 - __EM_SIZE - __stack_size, LENGTH = __stack_size
   hbnram    (wxa) : ORIGIN = 0x40010000, LENGTH = (4K)
   psram     (wxa) : ORIGIN = 0x24000000, LENGTH = (2M)
 }
 
 SECTIONS
 {
-  __stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
   BOOT2_PT_ADDR = 0x4202e094;
 
   .init :
@@ -232,12 +233,9 @@ SECTIONS
     *(COMMON)
   } >tcm_ocram
 
-  .stack (NOLOAD) : ALIGN(8)
+  .sha_ocram (NOLOAD) :
   {
-    PROVIDE ( _sp_base = . );
-    . = . + __stack_size;
-    PROVIDE( _sp_main = . );
-    __freertos_irq_stack_top = .;
+    *(.sha_ocram*)
   } >tcm_ocram
 
   . = ALIGN(8);
@@ -247,6 +245,28 @@ SECTIONS
   PROVIDE( _heap2_start = 0 );
   PROVIDE( _heap2_size = 0 );
 
+  .stack (NOLOAD) : ALIGN(8)
+  {
+    PROVIDE ( _sp_base = . );
+    . = . + __stack_size;
+    PROVIDE( _sp_main = . );
+    __freertos_irq_stack_top = .;
+  } >sys_stack
+
+  .psram (NOLOAD) :
+  {
+    . = ALIGN(16);
+    PROVIDE( _psram_start = . );
+    *(.wifi_ram*)
+    . = ALIGN(16);
+    PROVIDE( _psram_end = . );
+  } >psram
+
+  . = ALIGN(8);
+  PROVIDE( _heap3_start = . );
+  PROVIDE( _heap3_size = ORIGIN(psram) + LENGTH(psram) - _heap3_start );
+
+
   /* cli */
   PROVIDE( _ld_bl_static_cli_cmds_start = _bl_static_cli_cmds_start );
   PROVIDE( _ld_bl_static_cli_cmds_end   = _bl_static_cli_cmds_end );