comments

onnxruntime/core/mlas/inc/mlas.h

@@ -615,7 +615,7 @@ MlasGemm(
 // Currently only supported in ARM64
 //
 #if defined(MLAS_TARGET_ARM64)
-constexpr size_t MLAS_SYMM_QGEMM_BUF_OVERRUN = 15;
+constexpr size_t MLAS_SYMM_QGEMM_BUF_OVERRUN = 30;
 #else
 constexpr size_t MLAS_SYMM_QGEMM_BUF_OVERRUN = 0;
 #endif

onnxruntime/core/mlas/lib/aarch64/HalfGemmKernelNeon.S

@@ -283,7 +283,7 @@ x7  |v5.h[0]..v5.h[3]|  |v30.h[0]..v30.h[7] v31.h[0]..v31.h[7]|  x4
 .LM6N16OutterLoopNTail:
         subs    x1,x1,16                // N -= 16
         ldr     x8,[sp,#.LHGemmKernelFrame_B]
-        b.LO    .LM6StoreRemainderN     // remaining k < 16
+        b.LO    .LM6StoreRemainderN     // remaining N < 16
 
         cbnz    x19,.LM6N16SkipAccumulateOutput
         ldp     q0,q1,[x3]

onnxruntime/core/mlas/lib/arm64/HalfGemmKernelNeon.asm

@@ -283,7 +283,7 @@ M6N16LoopK_Epilogue
 M6N16OutterLoopNTail
         subs    x1,x1,16                // N -= 16
         ldr     x8,[sp,#HGemmKernelFrame_B]
-        b.LO    M6StoreRemainderN       // remaining k < 16
+        b.LO    M6StoreRemainderN       // remaining N < 16
 
         cbnz    x19,M6N16SkipAccumulateOutput
         ldp     q0,q1,[x3]

onnxruntime/core/mlas/lib/platform.cpp

@@ -53,7 +53,13 @@ MLASCPUIDInfo::MLASCPUIDInfo()
 #endif
 
 #if defined(BUILD_MLAS_NO_ONNXRUNTIME)
-MLASCPUIDInfo::MLASCPUIDInfo() { has_arm_neon_dot_ = ((getauxval(AT_HWCAP) & HWCAP_ASIMDDP) != 0); }
+MLASCPUIDInfo::MLASCPUIDInfo()
+{
+    has_arm_neon_dot_ = ((getauxval(AT_HWCAP) & HWCAP_ASIMDDP) != 0); 
+
+    // raw hack! Need CPUIDInfo implementation for more precise detection
+    has_fp16_ = has_arm_neon_dot_;
+}
 #endif
 
 #else