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ReadAnalog failed on selecting lower System Clocks #125

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dhineshkumarmcci opened this issue Feb 13, 2019 · 6 comments
Closed

ReadAnalog failed on selecting lower System Clocks #125

dhineshkumarmcci opened this issue Feb 13, 2019 · 6 comments
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@dhineshkumarmcci
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We tested Catena boards 4612 and 4801 at lower System Clocks (no USB) 2.097 MHz and 4.194 MHz. We see that the ReadAnalog failed with these two system clocks.

Further, we see function call AdcCalibrate returns false under the function CatenaStm32L0_ReadAnalog in CatenaStm32L0_ReadAnalog.cpp.

@terrillmoore
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@dhineshkumarmcci Please check the data sheet, and also look at the logic - are we timing out because of slow clock, or otherwise malfunctioning? Is the ADC not returning an value, returning an error bit, or some other symptom? Quote code in the issue (learn how to do that, I do that a lot) so that the reviewer doesn't have to dig through code. Thanks.

@dhineshkumarmcci
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@terrillmoore Thank you for your suggestion and feedback. I will be checking out the datasheet and will debug the issue further. I have quoted the code (that returns false) in this issue.

static bool AdcCalibrate(void)
{
uint32_t uTime;
if (ADC1->CR & ADC_CR_ADEN)
AdcDisable();
/* turn on the cal bit */
ADC1->ISR = ADC_ISR_EOCAL;
ADC1->CR |= ADC_CR_ADCAL;
uTime = millis();
while (! (ADC1->ISR & ADC_ISR_EOCAL))
{
if ((millis() - uTime) > 10)
return false;
}
uint32_t calData = ADC1->DR;
ADC1->ISR = ADC_ISR_EOCAL;
return true;
}

@terrillmoore
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@dhineshkumarmcci Let's think about this. What does line 223 do? It's a timeout, right?

Would it not make sense to increase the timeout at line 223 and see if it perhaps simply takes longer when running at a slower clock rate?

That way you can give us more information about the problem. Or you could eliminate the timeout and simply print out (or save) the actual time it takes... if it hangs you know it's really broken...

@terrillmoore
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I encounter the same thing on the 4612 -- changing the timeout did not seem to help, I still get:

?CatenaStm32L0::ReadAnalog(2): CatenaStm32L0_ReadAnalog() failed
vBus:    4094 mV
BME280:  T: 26 P: 97398 RH: 13
Si1133:  390 IR, 136 White, 6 UV
?CatenaStm32L0::ReadAnalog(3): CatenaStm32L0_ReadAnalog() failed
vBat:    4094 mV

(This is using the new catena4612_simple.ino sketch).

@terrillmoore
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Oh, I see, it's ReadAnalog() -- many of these functions have timeouts and probably all are incorrect. I will prepare a patch that parameterizes all the timeouts.

@terrillmoore
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I patched all to use a defined constant -- and even with a delay of 1000 milliseconds was unable to get calibration to complete. The STM32L0 reference RM0376 on page 298/299 says:

Refer to Section 7: Reset and clock control (RCC) on page 170 to see how PCLK and ADC asynchronous
clock are enabled

But there is no mention of the "ADC asynchronous clock" elsewhere in the manual. This seems to be an error. Switching to use PCLK by setting ADC_CFGR2_CKMODE_0 (binary 01) also does not help.

The only thing that helps is running with a clock of 16 MHz or greater.

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