A new option '--map_global_net_to_msb' for command 'pb_pin_fixup'

[tangxifan]

Motivate of the pull request

• To address an existing issue. If so, please provide a link to the issue:
• Breaking new feature. If so, please describe details in the description part.

Describe the technical details

What is currently done? (Provide issue link if applicable)

Currently, OpenFPGA has the following limitations:

• When --clock_modeling ideal is selected when running VPR, global nets will not be routed and their pin mapping on programmable blocks may be revoked by other nets due to optimization. Therefore, this command will restore the pin mapping for the global nets and pick a spare pin on programmable blocks.
• Currently, when selecting the proper pin for mapping, the first found spare Least Significant Bit (LSB) will be applied. However, we see limitations that some LSB pins may not be accessible to programmable global network. Therefore, MSB should also be considered as an option.

What does this pull request change?

This PR improves in the following aspects:

• Added a new option --map_global_net_to_msb for command pb_pin_fixup
• Added a new testcase to validate the new feature
• Update documentation for the new option

Which part of the code base require a change

• VPR
• Tileable routing architecture generator
• OpenFPGA libraries
• FPGA-Verilog
• FPGA-Bitstream
• FPGA-SDC
• FPGA-SPICE
• Flow scripts
• Architecture library
• Cell library
• Documentation
• Regression tests
• Continous Integration (CI) scripts

Impact of the pull request

• Require a change on Quality of Results (QoR)
• Break back-compatibility. If so, please list who may be influenced.