[mlir][spirv] Add a generic convert-to-spirv pass
#95942
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@llvm/pr-subscribers-mlir-spirv @llvm/pr-subscribers-mlir Author: Angel Zhang (angelz913) ChangesThis PR implements a MVP version of an MLIR lowering pipeline to SPIR-V. The goal of adding this pipeline is to have a better test coverage of SPIR-V compilation upstream, and enable writing simple kernels by hand. The dialects supported in this version include Relevant links Future plans
Patch is 43.88 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/95942.diff 13 Files Affected:
diff --git a/mlir/include/mlir/Conversion/ConvertToSPIRV/ConvertToSPIRV.h b/mlir/include/mlir/Conversion/ConvertToSPIRV/ConvertToSPIRV.h
new file mode 100644
index 0000000000000..b539f5059b871
--- /dev/null
+++ b/mlir/include/mlir/Conversion/ConvertToSPIRV/ConvertToSPIRV.h
@@ -0,0 +1,26 @@
+//===- ConvertToSPIRV.h - Conversion to SPIR-V pass ---*- C++ -*-===================//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef MLIR_CONVERSION_CONVERTTOSPIRV_CONVERTTOSPIRV_H
+#define MLIR_CONVERSION_CONVERTTOSPIRV_CONVERTTOSPIRV_H
+
+#include <memory>
+
+#include "mlir/Pass/Pass.h"
+
+#define GEN_PASS_DECL_CONVERTTOSPIRVPASS
+#include "mlir/Conversion/Passes.h.inc"
+
+namespace mlir {
+
+/// Create a pass that performs dialect conversion to SPIR-V for all dialects
+std::unique_ptr<OperationPass<>> createConvertToSPIRVPass();
+
+} // namespace mlir
+
+#endif // MLIR_CONVERSION_CONVERTTOSPIRV_CONVERTTOSPIRV_H
diff --git a/mlir/include/mlir/Conversion/Passes.h b/mlir/include/mlir/Conversion/Passes.h
index 7700299b3a4f3..81daec6fd0138 100644
--- a/mlir/include/mlir/Conversion/Passes.h
+++ b/mlir/include/mlir/Conversion/Passes.h
@@ -30,6 +30,7 @@
#include "mlir/Conversion/ControlFlowToSPIRV/ControlFlowToSPIRV.h"
#include "mlir/Conversion/ControlFlowToSPIRV/ControlFlowToSPIRVPass.h"
#include "mlir/Conversion/ConvertToLLVM/ToLLVMPass.h"
+#include "mlir/Conversion/ConvertToSPIRV/ConvertToSPIRV.h"
#include "mlir/Conversion/FuncToEmitC/FuncToEmitCPass.h"
#include "mlir/Conversion/FuncToLLVM/ConvertFuncToLLVMPass.h"
#include "mlir/Conversion/FuncToSPIRV/FuncToSPIRVPass.h"
diff --git a/mlir/include/mlir/Conversion/Passes.td b/mlir/include/mlir/Conversion/Passes.td
index db67d6a5ff128..5747b8d38001d 100644
--- a/mlir/include/mlir/Conversion/Passes.td
+++ b/mlir/include/mlir/Conversion/Passes.td
@@ -11,7 +11,6 @@
include "mlir/Pass/PassBase.td"
-
//===----------------------------------------------------------------------===//
// ToLLVM
//===----------------------------------------------------------------------===//
@@ -31,6 +30,20 @@ def ConvertToLLVMPass : Pass<"convert-to-llvm"> {
];
}
+//===----------------------------------------------------------------------===//
+// ToSPIRV
+//===----------------------------------------------------------------------===//
+
+def ConvertToSPIRVPass : Pass<"convert-to-spirv"> {
+ let summary = "Convert to SPIR-V";
+ let description = [{
+ This is a generic pass to convert to SPIR-V.
+ }];
+
+ let constructor = "mlir::createConvertToSPIRVPass()";
+ let options = [];
+}
+
//===----------------------------------------------------------------------===//
// AffineToStandard
//===----------------------------------------------------------------------===//
diff --git a/mlir/lib/Conversion/CMakeLists.txt b/mlir/lib/Conversion/CMakeLists.txt
index 0a03a2e133db1..e107738a4c50c 100644
--- a/mlir/lib/Conversion/CMakeLists.txt
+++ b/mlir/lib/Conversion/CMakeLists.txt
@@ -19,6 +19,7 @@ add_subdirectory(ControlFlowToLLVM)
add_subdirectory(ControlFlowToSCF)
add_subdirectory(ControlFlowToSPIRV)
add_subdirectory(ConvertToLLVM)
+add_subdirectory(ConvertToSPIRV)
add_subdirectory(FuncToEmitC)
add_subdirectory(FuncToLLVM)
add_subdirectory(FuncToSPIRV)
diff --git a/mlir/lib/Conversion/ConvertToSPIRV/CMakeLists.txt b/mlir/lib/Conversion/ConvertToSPIRV/CMakeLists.txt
new file mode 100644
index 0000000000000..9a93301f09b48
--- /dev/null
+++ b/mlir/lib/Conversion/ConvertToSPIRV/CMakeLists.txt
@@ -0,0 +1,22 @@
+set(LLVM_OPTIONAL_SOURCES
+ ConvertToSPIRVPass.cpp
+)
+
+add_mlir_conversion_library(MLIRConvertToSPIRVPass
+ ConvertToSPIRVPass.cpp
+
+ ADDITIONAL_HEADER_DIRS
+ ${MLIR_MAIN_INCLUDE_DIR}/mlir/Conversion/ConvertToSPIRV
+
+ DEPENDS
+ MLIRConversionPassIncGen
+
+ LINK_LIBS PUBLIC
+ MLIRIR
+ MLIRPass
+ MLIRRewrite
+ MLIRSPIRVConversion
+ MLIRSPIRVDialect
+ MLIRSupport
+ MLIRTransformUtils
+ )
diff --git a/mlir/lib/Conversion/ConvertToSPIRV/ConvertToSPIRVPass.cpp b/mlir/lib/Conversion/ConvertToSPIRV/ConvertToSPIRVPass.cpp
new file mode 100644
index 0000000000000..b755e7d7ffe13
--- /dev/null
+++ b/mlir/lib/Conversion/ConvertToSPIRV/ConvertToSPIRVPass.cpp
@@ -0,0 +1,86 @@
+//===- ConvertToSPIRVPass.cpp - MLIR SPIR-V Conversion
+//--------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "mlir/Conversion/ArithToSPIRV/ArithToSPIRV.h"
+#include "mlir/Conversion/ConvertToSPIRV/ConvertToSPIRV.h"
+#include "mlir/Conversion/FuncToSPIRV/FuncToSPIRV.h"
+#include "mlir/Conversion/IndexToSPIRV/IndexToSPIRV.h"
+#include "mlir/Conversion/SCFToSPIRV/SCFToSPIRV.h"
+#include "mlir/Conversion/UBToSPIRV/UBToSPIRV.h"
+#include "mlir/Conversion/VectorToSPIRV/VectorToSPIRV.h"
+#include "mlir/Dialect/Arith/Transforms/Passes.h"
+#include "mlir/Dialect/SPIRV/IR/SPIRVDialect.h"
+#include "mlir/Dialect/SPIRV/Transforms/SPIRVConversion.h"
+#include "mlir/Dialect/Vector/Transforms/VectorRewritePatterns.h"
+#include "mlir/IR/PatternMatch.h"
+#include "mlir/Pass/Pass.h"
+#include "mlir/Rewrite/FrozenRewritePatternSet.h"
+#include "mlir/Transforms/DialectConversion.h"
+#include "mlir/Transforms/GreedyPatternRewriteDriver.h"
+#include <memory>
+
+#define DEBUG_TYPE "convert-to-spirv"
+
+namespace mlir {
+#define GEN_PASS_DEF_CONVERTTOSPIRVPASS
+#include "mlir/Conversion/Passes.h.inc"
+} // namespace mlir
+
+using namespace mlir;
+
+namespace {
+
+/// A pass to perform the SPIR-V conversion.
+class ConvertToSPIRVPass
+ : public impl::ConvertToSPIRVPassBase<ConvertToSPIRVPass> {
+
+public:
+ using impl::ConvertToSPIRVPassBase<
+ ConvertToSPIRVPass>::ConvertToSPIRVPassBase;
+
+ // Register dependent dialects for the current pass
+ void getDependentDialects(DialectRegistry ®istry) const override {
+ registry.insert<spirv::SPIRVDialect>();
+ }
+
+ void runOnOperation() final {
+ MLIRContext *context = &getContext();
+ Operation *op = getOperation();
+
+ auto targetAttr = spirv::lookupTargetEnvOrDefault(op);
+ SPIRVTypeConverter typeConverter(targetAttr);
+
+ RewritePatternSet patterns(context);
+ ScfToSPIRVContext scfToSPIRVContext;
+
+ // Populate patterns.
+ arith::populateCeilFloorDivExpandOpsPatterns(patterns);
+ arith::populateArithToSPIRVPatterns(typeConverter, patterns);
+ populateBuiltinFuncToSPIRVPatterns(typeConverter, patterns);
+ populateFuncToSPIRVPatterns(typeConverter, patterns);
+ index::populateIndexToSPIRVPatterns(typeConverter, patterns);
+ populateVectorToSPIRVPatterns(typeConverter, patterns);
+ populateSCFToSPIRVPatterns(typeConverter, scfToSPIRVContext, patterns);
+ ub::populateUBToSPIRVConversionPatterns(typeConverter, patterns);
+
+ std::unique_ptr<ConversionTarget> target =
+ SPIRVConversionTarget::get(targetAttr);
+
+ FrozenRewritePatternSet frozenPatterns(std::move(patterns));
+ if (failed(applyPartialConversion(op, *target, frozenPatterns))) {
+ return signalPassFailure();
+ }
+ }
+};
+
+} // namespace
+
+std::unique_ptr<OperationPass<>> mlir::createConvertToSPIRVPass() {
+ return std::make_unique<ConvertToSPIRVPass>();
+}
diff --git a/mlir/test/Conversion/ConvertToSPIRV/arith.mlir b/mlir/test/Conversion/ConvertToSPIRV/arith.mlir
new file mode 100644
index 0000000000000..823e9b4a6c3ab
--- /dev/null
+++ b/mlir/test/Conversion/ConvertToSPIRV/arith.mlir
@@ -0,0 +1,276 @@
+// RUN: mlir-opt -convert-to-spirv -split-input-file %s | FileCheck %s
+
+//===----------------------------------------------------------------------===//
+// arithmetic ops
+//===----------------------------------------------------------------------===//
+
+// CHECK-LABEL: @int32_scalar
+func.func @int32_scalar(%lhs: i32, %rhs: i32) {
+ // CHECK: spirv.IAdd %{{.*}}, %{{.*}}: i32
+ %0 = arith.addi %lhs, %rhs: i32
+ // CHECK: spirv.ISub %{{.*}}, %{{.*}}: i32
+ %1 = arith.subi %lhs, %rhs: i32
+ // CHECK: spirv.IMul %{{.*}}, %{{.*}}: i32
+ %2 = arith.muli %lhs, %rhs: i32
+ // CHECK: spirv.SDiv %{{.*}}, %{{.*}}: i32
+ %3 = arith.divsi %lhs, %rhs: i32
+ // CHECK: spirv.UDiv %{{.*}}, %{{.*}}: i32
+ %4 = arith.divui %lhs, %rhs: i32
+ // CHECK: spirv.UMod %{{.*}}, %{{.*}}: i32
+ %5 = arith.remui %lhs, %rhs: i32
+ return
+}
+
+// CHECK-LABEL: @int32_scalar_srem
+// CHECK-SAME: (%[[LHS:.+]]: i32, %[[RHS:.+]]: i32)
+func.func @int32_scalar_srem(%lhs: i32, %rhs: i32) {
+ // CHECK: %[[LABS:.+]] = spirv.GL.SAbs %[[LHS]] : i32
+ // CHECK: %[[RABS:.+]] = spirv.GL.SAbs %[[RHS]] : i32
+ // CHECK: %[[ABS:.+]] = spirv.UMod %[[LABS]], %[[RABS]] : i32
+ // CHECK: %[[POS:.+]] = spirv.IEqual %[[LHS]], %[[LABS]] : i32
+ // CHECK: %[[NEG:.+]] = spirv.SNegate %[[ABS]] : i32
+ // CHECK: %{{.+}} = spirv.Select %[[POS]], %[[ABS]], %[[NEG]] : i1, i32
+ %0 = arith.remsi %lhs, %rhs: i32
+ return
+}
+
+// -----
+
+//===----------------------------------------------------------------------===//
+// std bit ops
+//===----------------------------------------------------------------------===//
+
+// CHECK-LABEL: @bitwise_scalar
+func.func @bitwise_scalar(%arg0 : i32, %arg1 : i32) {
+ // CHECK: spirv.BitwiseAnd
+ %0 = arith.andi %arg0, %arg1 : i32
+ // CHECK: spirv.BitwiseOr
+ %1 = arith.ori %arg0, %arg1 : i32
+ // CHECK: spirv.BitwiseXor
+ %2 = arith.xori %arg0, %arg1 : i32
+ return
+}
+
+// CHECK-LABEL: @bitwise_vector
+func.func @bitwise_vector(%arg0 : vector<4xi32>, %arg1 : vector<4xi32>) {
+ // CHECK: spirv.BitwiseAnd
+ %0 = arith.andi %arg0, %arg1 : vector<4xi32>
+ // CHECK: spirv.BitwiseOr
+ %1 = arith.ori %arg0, %arg1 : vector<4xi32>
+ // CHECK: spirv.BitwiseXor
+ %2 = arith.xori %arg0, %arg1 : vector<4xi32>
+ return
+}
+
+// CHECK-LABEL: @logical_scalar
+func.func @logical_scalar(%arg0 : i1, %arg1 : i1) {
+ // CHECK: spirv.LogicalAnd
+ %0 = arith.andi %arg0, %arg1 : i1
+ // CHECK: spirv.LogicalOr
+ %1 = arith.ori %arg0, %arg1 : i1
+ // CHECK: spirv.LogicalNotEqual
+ %2 = arith.xori %arg0, %arg1 : i1
+ return
+}
+
+// CHECK-LABEL: @logical_vector
+func.func @logical_vector(%arg0 : vector<4xi1>, %arg1 : vector<4xi1>) {
+ // CHECK: spirv.LogicalAnd
+ %0 = arith.andi %arg0, %arg1 : vector<4xi1>
+ // CHECK: spirv.LogicalOr
+ %1 = arith.ori %arg0, %arg1 : vector<4xi1>
+ // CHECK: spirv.LogicalNotEqual
+ %2 = arith.xori %arg0, %arg1 : vector<4xi1>
+ return
+}
+
+// CHECK-LABEL: @shift_scalar
+func.func @shift_scalar(%arg0 : i32, %arg1 : i32) {
+ // CHECK: spirv.ShiftLeftLogical
+ %0 = arith.shli %arg0, %arg1 : i32
+ // CHECK: spirv.ShiftRightArithmetic
+ %1 = arith.shrsi %arg0, %arg1 : i32
+ // CHECK: spirv.ShiftRightLogical
+ %2 = arith.shrui %arg0, %arg1 : i32
+ return
+}
+
+// CHECK-LABEL: @shift_vector
+func.func @shift_vector(%arg0 : vector<4xi32>, %arg1 : vector<4xi32>) {
+ // CHECK: spirv.ShiftLeftLogical
+ %0 = arith.shli %arg0, %arg1 : vector<4xi32>
+ // CHECK: spirv.ShiftRightArithmetic
+ %1 = arith.shrsi %arg0, %arg1 : vector<4xi32>
+ // CHECK: spirv.ShiftRightLogical
+ %2 = arith.shrui %arg0, %arg1 : vector<4xi32>
+ return
+}
+
+// -----
+
+//===----------------------------------------------------------------------===//
+// arith.cmpf
+//===----------------------------------------------------------------------===//
+
+// CHECK-LABEL: @cmpf
+func.func @cmpf(%arg0 : f32, %arg1 : f32) {
+ // CHECK: spirv.FOrdEqual
+ %1 = arith.cmpf oeq, %arg0, %arg1 : f32
+ // CHECK: spirv.FOrdGreaterThan
+ %2 = arith.cmpf ogt, %arg0, %arg1 : f32
+ // CHECK: spirv.FOrdGreaterThanEqual
+ %3 = arith.cmpf oge, %arg0, %arg1 : f32
+ // CHECK: spirv.FOrdLessThan
+ %4 = arith.cmpf olt, %arg0, %arg1 : f32
+ // CHECK: spirv.FOrdLessThanEqual
+ %5 = arith.cmpf ole, %arg0, %arg1 : f32
+ // CHECK: spirv.FOrdNotEqual
+ %6 = arith.cmpf one, %arg0, %arg1 : f32
+ // CHECK: spirv.FUnordEqual
+ %7 = arith.cmpf ueq, %arg0, %arg1 : f32
+ // CHECK: spirv.FUnordGreaterThan
+ %8 = arith.cmpf ugt, %arg0, %arg1 : f32
+ // CHECK: spirv.FUnordGreaterThanEqual
+ %9 = arith.cmpf uge, %arg0, %arg1 : f32
+ // CHECK: spirv.FUnordLessThan
+ %10 = arith.cmpf ult, %arg0, %arg1 : f32
+ // CHECK: FUnordLessThanEqual
+ %11 = arith.cmpf ule, %arg0, %arg1 : f32
+ // CHECK: spirv.FUnordNotEqual
+ %12 = arith.cmpf une, %arg0, %arg1 : f32
+ return
+}
+
+// CHECK-LABEL: @vec1cmpf
+func.func @vec1cmpf(%arg0 : vector<1xf32>, %arg1 : vector<1xf32>) {
+ // CHECK: spirv.FOrdGreaterThan
+ %0 = arith.cmpf ogt, %arg0, %arg1 : vector<1xf32>
+ // CHECK: spirv.FUnordLessThan
+ %1 = arith.cmpf ult, %arg0, %arg1 : vector<1xf32>
+ return
+}
+
+// -----
+
+//===----------------------------------------------------------------------===//
+// arith.cmpi
+//===----------------------------------------------------------------------===//
+
+// CHECK-LABEL: @cmpi
+func.func @cmpi(%arg0 : i32, %arg1 : i32) {
+ // CHECK: spirv.IEqual
+ %0 = arith.cmpi eq, %arg0, %arg1 : i32
+ // CHECK: spirv.INotEqual
+ %1 = arith.cmpi ne, %arg0, %arg1 : i32
+ // CHECK: spirv.SLessThan
+ %2 = arith.cmpi slt, %arg0, %arg1 : i32
+ // CHECK: spirv.SLessThanEqual
+ %3 = arith.cmpi sle, %arg0, %arg1 : i32
+ // CHECK: spirv.SGreaterThan
+ %4 = arith.cmpi sgt, %arg0, %arg1 : i32
+ // CHECK: spirv.SGreaterThanEqual
+ %5 = arith.cmpi sge, %arg0, %arg1 : i32
+ // CHECK: spirv.ULessThan
+ %6 = arith.cmpi ult, %arg0, %arg1 : i32
+ // CHECK: spirv.ULessThanEqual
+ %7 = arith.cmpi ule, %arg0, %arg1 : i32
+ // CHECK: spirv.UGreaterThan
+ %8 = arith.cmpi ugt, %arg0, %arg1 : i32
+ // CHECK: spirv.UGreaterThanEqual
+ %9 = arith.cmpi uge, %arg0, %arg1 : i32
+ return
+}
+
+// CHECK-LABEL: @indexcmpi
+func.func @indexcmpi(%arg0 : index, %arg1 : index) {
+ // CHECK: spirv.IEqual
+ %0 = arith.cmpi eq, %arg0, %arg1 : index
+ // CHECK: spirv.INotEqual
+ %1 = arith.cmpi ne, %arg0, %arg1 : index
+ // CHECK: spirv.SLessThan
+ %2 = arith.cmpi slt, %arg0, %arg1 : index
+ // CHECK: spirv.SLessThanEqual
+ %3 = arith.cmpi sle, %arg0, %arg1 : index
+ // CHECK: spirv.SGreaterThan
+ %4 = arith.cmpi sgt, %arg0, %arg1 : index
+ // CHECK: spirv.SGreaterThanEqual
+ %5 = arith.cmpi sge, %arg0, %arg1 : index
+ // CHECK: spirv.ULessThan
+ %6 = arith.cmpi ult, %arg0, %arg1 : index
+ // CHECK: spirv.ULessThanEqual
+ %7 = arith.cmpi ule, %arg0, %arg1 : index
+ // CHECK: spirv.UGreaterThan
+ %8 = arith.cmpi ugt, %arg0, %arg1 : index
+ // CHECK: spirv.UGreaterThanEqual
+ %9 = arith.cmpi uge, %arg0, %arg1 : index
+ return
+}
+
+// CHECK-LABEL: @vec1cmpi
+func.func @vec1cmpi(%arg0 : vector<1xi32>, %arg1 : vector<1xi32>) {
+ // CHECK: spirv.ULessThan
+ %0 = arith.cmpi ult, %arg0, %arg1 : vector<1xi32>
+ // CHECK: spirv.SGreaterThan
+ %1 = arith.cmpi sgt, %arg0, %arg1 : vector<1xi32>
+ return
+}
+
+// CHECK-LABEL: @boolcmpi_equality
+func.func @boolcmpi_equality(%arg0 : i1, %arg1 : i1) {
+ // CHECK: spirv.LogicalEqual
+ %0 = arith.cmpi eq, %arg0, %arg1 : i1
+ // CHECK: spirv.LogicalNotEqual
+ %1 = arith.cmpi ne, %arg0, %arg1 : i1
+ return
+}
+
+// CHECK-LABEL: @boolcmpi_unsigned
+func.func @boolcmpi_unsigned(%arg0 : i1, %arg1 : i1) {
+ // CHECK-COUNT-2: spirv.Select
+ // CHECK: spirv.UGreaterThanEqual
+ %0 = arith.cmpi uge, %arg0, %arg1 : i1
+ // CHECK-COUNT-2: spirv.Select
+ // CHECK: spirv.ULessThan
+ %1 = arith.cmpi ult, %arg0, %arg1 : i1
+ return
+}
+
+// CHECK-LABEL: @vec1boolcmpi_equality
+func.func @vec1boolcmpi_equality(%arg0 : vector<1xi1>, %arg1 : vector<1xi1>) {
+ // CHECK: spirv.LogicalEqual
+ %0 = arith.cmpi eq, %arg0, %arg1 : vector<1xi1>
+ // CHECK: spirv.LogicalNotEqual
+ %1 = arith.cmpi ne, %arg0, %arg1 : vector<1xi1>
+ return
+}
+
+// CHECK-LABEL: @vec1boolcmpi_unsigned
+func.func @vec1boolcmpi_unsigned(%arg0 : vector<1xi1>, %arg1 : vector<1xi1>) {
+ // CHECK-COUNT-2: spirv.Select
+ // CHECK: spirv.UGreaterThanEqual
+ %0 = arith.cmpi uge, %arg0, %arg1 : vector<1xi1>
+ // CHECK-COUNT-2: spirv.Select
+ // CHECK: spirv.ULessThan
+ %1 = arith.cmpi ult, %arg0, %arg1 : vector<1xi1>
+ return
+}
+
+// CHECK-LABEL: @vecboolcmpi_equality
+func.func @vecboolcmpi_equality(%arg0 : vector<4xi1>, %arg1 : vector<4xi1>) {
+ // CHECK: spirv.LogicalEqual
+ %0 = arith.cmpi eq, %arg0, %arg1 : vector<4xi1>
+ // CHECK: spirv.LogicalNotEqual
+ %1 = arith.cmpi ne, %arg0, %arg1 : vector<4xi1>
+ return
+}
+
+// CHECK-LABEL: @vecboolcmpi_unsigned
+func.func @vecboolcmpi_unsigned(%arg0 : vector<3xi1>, %arg1 : vector<3xi1>) {
+ // CHECK-COUNT-2: spirv.Select
+ // CHECK: spirv.UGreaterThanEqual
+ %0 = arith.cmpi uge, %arg0, %arg1 : vector<3xi1>
+ // CHECK-COUNT-2: spirv.Select
+ // CHECK: spirv.ULessThan
+ %1 = arith.cmpi ult, %arg0, %arg1 : vector<3xi1>
+ return
+}
diff --git a/mlir/test/Conversion/ConvertToSPIRV/combined.mlir b/mlir/test/Conversion/ConvertToSPIRV/combined.mlir
new file mode 100644
index 0000000000000..9e908465cb142
--- /dev/null
+++ b/mlir/test/Conversion/ConvertToSPIRV/combined.mlir
@@ -0,0 +1,47 @@
+// RUN: mlir-opt -convert-to-spirv %s | FileCheck %s
+
+// CHECK-LABEL: @combined
+// CHECK: %[[C0_F32:.*]] = spirv.Constant 0.000000e+00 : f32
+// CHECK: %[[C1_F32:.*]] = spirv.Constant 1.000000e+00 : f32
+// CHECK: %[[C0_I32:.*]] = spirv.Constant 0 : i32
+// CHECK: %[[C4_I32:.*]] = spirv.Constant 4 : i32
+// CHECK: %[[C0_I32_0:.*]] = spirv.Constant 0 : i32
+// CHECK: %[[C4_I32_0:.*]] = spirv.Constant 4 : i32
+// CHECK: %[[C1_I32:.*]] = spirv.Constant 1 : i32
+// CHECK: %[[VEC:.*]] = spirv.Constant dense<1.000000e+00> : vector<4xf32>
+// CHECK: %[[VARIABLE:.*]] = spirv.Variable : !spirv.ptr<f32, Function>
+// CHECK: spirv.mlir.loop {
+// CHECK: spirv.Branch ^[[HEADER:.*]](%[[C0_I32_0]], %[[C0_F32]] : i32, f32)
+// CHECK: ^[[HEADER]](%[[INDVAR_0:.*]]: i32, %[[INDVAR_1:.*]]: f32):
+// CHECK: %[[SLESSTHAN:.*]] = spirv.SLessThan %[[INDVAR_0]], %[[C4_I32_0]] : i32
+// CHECK: spirv.BranchConditional %[[SLESSTHAN]], ^[[BODY:.*]], ^[[MERGE:.*]]
+// CHECK: ^[[BODY]]:
+// CHECK: %[[FADD:.*]] = spirv.FAdd %[[INDVAR_1]], %[[C1_F32]] : f32
+// CHECK: %[[INSERT:.*]] = spirv.CompositeInsert %[[FADD]], %[[VEC]][0 : i32] : f32 into vector<4xf32>
+// CHECK: spirv.Store "Function" %[[VARIABLE]], %[[FADD]] : f32
+// CHECK: %[[IADD:.*]] = spirv.IAdd %[[INDVAR_0]], %[[C1_I32]] : i32
+// CHECK: spirv.Branch ^[[HEADER]](%[[IADD]], %[[FADD]] : i32, f32)
+// CHECK: ^[[MERGE]]:
+// CHECK: spirv.mlir.merge
+// CHECK: }
+// CHECK: %[[LOAD:.*]] = spirv.Load "Function" %[[VARIABLE]] : f32
+// CHECK: %[[UNDEF:.*]] = spirv.Undef : f32
+// CHECK: spirv.ReturnValue %[[UNDEF]] : f32
+func.func @combined() -> f32 {
+ %c0_f32 = arith.constant 0.0 : f32
+ %c1_f32 = arith.constant 1.0 : f32
+ %c0_i32 = arith.constant 0 : i32
+ %c4_i32 = arith.constant 4 : i32
+ %lb = index.casts %c0_i32 : i32 to index
+ %ub = index.casts %c4_i32 : i32 to index
+ %step = arith.constant 1 : index
+ %buf = vector.broadcast %c1_f32 : f32 to vector<4xf32>
+ scf.for %iv = %lb to %ub step %step iter_args(%sum_iter = %c0_f32) -> f32 {
+ %t = vector.extract %buf[0] : f32 from vector<4xf32>
+ %sum_next = arith.addf %sum_iter, %t : f32
+ vector.insert %sum_next, %buf[0] : f32 into vector<4xf32>
+ scf.yield %sum_next : f32
+ }
+ %ret = ub.poison : f32
+ return %ret : f32
+}
diff --git a/mlir/test/Conversion/ConvertToSPIRV/index.mlir b/mlir/test/Conversion/ConvertToSPIRV/index.mlir
new file mode 100644
index 0000000000000..5ad2217add0d4
--- /dev/null
+++ b/mlir/test/Conversion/ConvertToSPIRV/index.mlir
@@ -0,0 +1,104 @@
+// RUN: mlir-opt %s -convert-to-spirv | FileCheck %s
+
+// CHECK-LABEL: @basic
+func.func @basic(%a: index, %b: index) {
+ // CHECK: spirv.IAdd
+ %0 = index.add %a, %b
+ // CHECK: spirv.ISub
+ %1 = index.sub %a, %b
+ // CHECK: spirv.IMul
+ %2 = index.mul %a, %b
+ // CHECK: spirv.SDiv
+ %3 = index.divs %a, %b
+ // CHECK: spirv.UDiv
+ %4 = index.divu %a, %b
+ // CHECK: spirv.SRem
+ %5 = index.rems %a, %b
+ // CHECK: spirv.UMod
+ %6 = index.remu %a, %b
+ // CHECK: spirv.GL.SMax
+ %7 = index.maxs %a, %b
+ // CHECK: spirv.GL.UMax
+ %8 = index.maxu...
[truncated]
|
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This commit implements a MVP version of an MLIR lowering pipeline to SPIR-V. The goal is to have a better test coverage of SPIR-V compilation upstream, and enable writing simple kernels by hand. The dialects supported in this version include arith, vector (only 1-D vectors with size 2,3,4,8 or 16), scf, ub, index, func and math.
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LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/89/builds/547 Here is the relevant piece of the build log for the reference: |
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…)" This reverts commit 6a69cfb.
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This PR implements a MVP version of an MLIR lowering pipeline to SPIR-V. The goal of adding this pipeline is to have a better test coverage of SPIR-V compilation upstream, and enable writing simple kernels by hand. The dialects supported in this version include `arith`, `vector` (only 1-D vectors with size 2,3,4,8 or 16), `scf`, `ub`, `index`, `func` and `math`. New test cases for the pass are also included in this PR. **Relevant links** - [Open MLIR Meeting - YouTube Video](https://www.youtube.com/watch?v=csWPOQfgLMo) - [Discussion on LLVM Forum](https://discourse.llvm.org/t/open-mlir-meeting-12-14-2023-discussion-on-improving-handling-of-unit-dimensions-in-the-vector-dialect/75683) **Future plans** - Add conversion patterns for other dialects, e.g. `gpu`, `tensor`, etc. - Include vector transformation to unroll vectors to 1-D, and handle those with unsupported sizes. - Implement multiple-return. SPIR-V does not support multiple return values since a `spirv.func` can only return zero or one values. It might be possible to wrap the return values in a `spirv.struct`. - Add a conversion for `scf.parallel`.
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This PR relands #95942, which was reverted in #96332 due to link failures. It fixes the issue by updating CMake dependencies. The bazel support, originally introduced in #96334, is also included in this PR. --------- Co-authored-by: Keith Smiley <[email protected]>
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This PR implements a MVP version of an MLIR lowering pipeline to SPIR-V. The goal of adding this pipeline is to have a better test coverage of SPIR-V compilation upstream, and enable writing simple kernels by hand. The dialects supported in this version include `arith`, `vector` (only 1-D vectors with size 2,3,4,8 or 16), `scf`, `ub`, `index`, `func` and `math`. New test cases for the pass are also included in this PR. **Relevant links** - [Open MLIR Meeting - YouTube Video](https://www.youtube.com/watch?v=csWPOQfgLMo) - [Discussion on LLVM Forum](https://discourse.llvm.org/t/open-mlir-meeting-12-14-2023-discussion-on-improving-handling-of-unit-dimensions-in-the-vector-dialect/75683) **Future plans** - Add conversion patterns for other dialects, e.g. `gpu`, `tensor`, etc. - Include vector transformation to unroll vectors to 1-D, and handle those with unsupported sizes. - Implement multiple-return. SPIR-V does not support multiple return values since a `spirv.func` can only return zero or one values. It might be possible to wrap the return values in a `spirv.struct`. - Add a conversion for `scf.parallel`.
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) Reverts llvm#95942 due to link failures.
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Original change was reverted Reverts llvm#96334
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This PR relands llvm#95942, which was reverted in llvm#96332 due to link failures. It fixes the issue by updating CMake dependencies. The bazel support, originally introduced in llvm#96334, is also included in this PR. --------- Co-authored-by: Keith Smiley <[email protected]>
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This PR adds conversion patterns for MemRef to the `convert-to-spirv` pass, introduced in #95942. Conversions from MemRef memory space to SPIR-V storage class were also included, and would run before the final dialect conversion phase. **Future Plans** - Add tests for ops other than `memref.load` and `memref.store` --------- Co-authored-by: Jakub Kuderski <[email protected]>
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This PR adds conversion patterns for MemRef to the `convert-to-spirv` pass, introduced in llvm#95942. Conversions from MemRef memory space to SPIR-V storage class were also included, and would run before the final dialect conversion phase. **Future Plans** - Add tests for ops other than `memref.load` and `memref.store` --------- Co-authored-by: Jakub Kuderski <[email protected]>
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…spirv` pass (llvm#102528) This PR adds lit tests that check for `scf.while` and `scf.for` conversions for the `convert-to-spirv` pass, introduced in llvm#95942.
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This PR adds conversion patterns for GPU to the `convert-to-spirv` pass, introduced in #95942. Now the pass is able to convert each `gpu.module` and its ops within a `builtin.module` into a `spirv.module`. **Future Plans** - Use `gpu.launch_func` to invoke kernel from host functions - Potentially integrate into the `mlir-vulkan-runner` for e2e testing
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* [IRBuilder] Generate nuw GEPs for struct member accesses (#99538)
Generate nuw GEPs for struct member accesses, as inbounds + non-negative
implies nuw.
Regression tests are updated using update scripts where possible, and by
find + replace where not.
* Revert "[mlir][ArmSME] Pattern to swap shape_cast(tranpose) with transpose(shape_cast) (#100731)" (#102457)
This reverts commit 88accd9aaa20c6a30661c48cc2ca6dbbdf991ec0.
This change can be dropped in favor of just #102017.
* [NFC] Use references to avoid copying (#99863)
Modifying `auto` to `auto&` to avoid unnecessary copying
* [clang] Implement CWG2627 Bit-fields and narrowing conversions (#78112)
https://cplusplus.github.io/CWG/issues/2627.html
It is no longer a narrowing conversion when converting a bit-field to a
type smaller than the field's declared type if the bit-field has a width
small enough to fit in the target type. This includes integral
promotions (`long long i : 8` promoted to `int` is no longer narrowing,
allowing `c.i <=> c.i`) and list-initialization (`int n{ c.i };`)
Also applies back to C++11 as this is a defect report.
* [mlir][vector] Disable `vector.matrix_multiply` for scalable vectors (#102573)
Disables `vector.matrix_multiply` for scalable vectors. As per the docs:
> This is the counterpart of llvm.matrix.multiply in MLIR
I'm not aware of any use of matrix-multiply intrinsics in the context of
scalable vectors, hence disabling.
* [mlir][vector] Add tests for scalable vectors in one-shot-bufferize.mlir (#102361)
* [flang][OpenMP] Handle multiple ranges in `num_teams` clause (#102535)
Commit cee594cf36 added support to clang for multiple expressions in
`num_teams` clause. Add follow-up changes to flang.
* [InstCombine] Remove unnecessary RUN line from test (NFC)
As all the necessary information is encoded using attributes
nowadays, this test doesn't actually depend on the triple
anymore.
* [RISCV] Add Syntacore SCR5 RV32/64 processors definition (#102285)
Syntacore SCR5 is an entry-level Linux-capable 32/64-bit RISC-V
processor core.
Overview: https://syntacore.com/products/scr5
Scheduling model will be added in a subsequent PR.
Co-authored-by: Dmitrii Petrov <[email protected]>
Co-authored-by: Anton Afanasyev <[email protected]>
* Revert "Enable logf128 constant folding for hosts with 128bit floats (#96287)"
This reverts commit ccb2b011e577e861254f61df9c59494e9e122b38.
Causes buildbot failures, e.g. on ppc64le builders.
* LSV/test/AArch64: add missing lit.local.cfg; fix build (#102607)
Follow up on 199d6f2 (LSV: document hang reported in #37865) to fix the
build when omitting the AArch64 target. Add the missing lit.local.cfg.
* [MemoryBuiltins] Handle allocator attributes on call-site
We should handle allocator attributes not only on function
declarations, but also on the call-site. That way we can e.g.
also optimize cases where the allocator function is a virtual
function call.
This was already supported in some of the MemoryBuiltins helpers,
but not all of them. This adds support for allocsize, alloc-family
and allockind("free").
* [AArch64] Add invalid 1 x vscale costs for reductions and reduction-operations. (#102105)
The code-generator is currently not able to handle scalable vectors of
<vscale x 1 x eltty>. The usual "fix" for this until it is supported is
to mark the costs of loads/stores with an invalid cost, preventing the
vectorizer from vectorizing at those factors. But on rare occasions
loops do not contain load/stores, only reductions.
So whilst this is still unsupported return an invalid cost to avoid
selecting vscale x 1 VFs. The cost of a reduction is not currently used
by the vectorizer so this adds the cost to the add/mul/and/or/xor or
min/max that should feed the reduction. It includes reduction costs
too, for completeness. This change will be removed when code-generation
for these types is sufficiently reliable.
Fixes #99760
* Unnamed bitfields are not nonstatic data members.
* [MemoryBuiltins] Simplify getCalledFunction() helper (NFC)
If nobuiltin is set, directly return nullptr instead of using a
separate out parameter and having all callers check this.
* AMDGPU/NewPM: Port SIFixSGPRCopies to new pass manager (#102614)
This allows moving some tests relying on -stop-after=amdgpu-isel
to move to checking -stop-after=finalize-isel instead, which
will more reliably pass the verifier.
* [llvm-readobj][COFF] Dump hybrid objects for ARM64X files. (#102245)
* Fix a unit test input file (#102567)
I forgot to update the version info in the SDKSettings file when I
updated it to the real version relevant to the test.
* [MLIR][GPU-LLVM] Convert `gpu.func` to `llvm.func` (#101664)
Add support in `-convert-gpu-to-llvm-spv` to convert `gpu.func` to
`llvm.func` operations.
- `spir_kernel`/`spir_func` calling conventions used for
kernels/functions.
- `workgroup` attributions encoded as additional `llvm.ptr<3>`
arguments.
- No attribute used to annotate kernels
- `reqd_work_group_size` attribute using to encode
`gpu.known_block_size`.
- `llvm.mlir.workgroup_attrib_size` used to encode workgroup attribution
sizes. This will be attached to the pointer argument workgroup
attributions lower to.
**Note**: A notable missing feature that will be addressed in a
follow-up PR is a `-use-bare-ptr-memref-call-conv` option to replace
MemRef arguments with bare pointers to the MemRef element types instead
of the current MemRef descriptor approach.
---------
Signed-off-by: Victor Perez <[email protected]>
* [mlir][spirv] Support `memref` in `convert-to-spirv` pass (#102534)
This PR adds conversion patterns for MemRef to the `convert-to-spirv`
pass, introduced in #95942. Conversions from MemRef memory space to
SPIR-V storage class were also included, and would run before the final
dialect conversion phase.
**Future Plans**
- Add tests for ops other than `memref.load` and `memref.store`
---------
Co-authored-by: Jakub Kuderski <[email protected]>
* [libc][math][c23] Add totalorderl function. (#102564)
* [AMDGPU][AsmParser][NFCI] All NamedIntOperands to be of the i32 type. (#102616)
There's no need for them to have different types.
Part of <https://github.com/llvm/llvm-project/issues/62629>.
* [ARM] Regenerate big-endian-vmov.ll. NFC
* [Clang][OMPX] Add the code generation for multi-dim `num_teams` (#101407)
This patch adds the code generation support for multi-dim `num_teams`
clause when it is used with `target teams ompx_bare` construct.
* [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (#82130)
Prior to this patch, SelectionDAG generated aligned move onto stacks for
AVX registers when the function was marked as a no-realign-stack
function. This lead to misalignment between the stack and the
instruction generated. This patch fixes the issue. There was a similar
issue reported for `extractelement` which was fixed in
a6614ec5b7c1dbfc4b847884c5de780cf75e8e9c
Co-authored-by: Manish Kausik H <[email protected]>
* [bazel] Port for d45de8003a269066c9a9af871119a7c36eeb5aa3
* [Clang] Simplify specifying passes via -Xoffload-linker (#102483)
Make it possible to do things like the following, regardless of whether
the offload target is nvptx or amdgpu:
```
$ clang -O1 -g -fopenmp --offload-arch=native test.c \
-Xoffload-linker -mllvm=-pass-remarks=inline \
-Xoffload-linker -mllvm=-force-remove-attribute=g.internalized:noinline\
-Xoffload-linker --lto-newpm-passes='forceattrs,default<O1>' \
-Xoffload-linker --lto-debug-pass-manager \
-foffload-lto
```
To accomplish that:
- In clang-linker-wrapper, do not forward options via `-Wl` if they
might have literal commas. Use `-Xlinker` instead.
- In clang-nvlink-wrapper, accept `--lto-debug-pass-manager` and
`--lto-newpm-passes`.
- In clang-nvlink-wrapper, drop `-passes` because it's inconsistent with
the interface of `lld`, which is used instead of clang-nvlink-wrapper
when the target is amdgpu. Without this patch, `-passes` is passed to
`nvlink`, producing an error anyway.
---------
Co-authored-by: Joseph Huber <[email protected]>
* [bazel] Add missing dep for the SPIRVToLLVM target
* [gn] Give two scripts argparse.RawDescriptionHelpFormatter
Without this, the doc string is put in a single line. These
scripts have multi-line docstrings, so this makes their --help
output look much nicer.
Otherwise, no behavior change.
* [X86] Convert truncsat clamping patterns to use SDPatternMatch. NFC.
Inspired by #99418 (which hopefully we can replace this code with at some point)
* [Clang] Fix Handling of Init Capture with Parameter Packs in LambdaScopeForCallOperatorInstantiationRAII (#100766)
This PR addresses issues related to the handling of `init capture` with
parameter packs in Clang's
`LambdaScopeForCallOperatorInstantiationRAII`.
Previously, `addInstantiatedCapturesToScope` would add `init capture`
containing packs to the scope using the type of the `init capture` to
determine the expanded pack size. However, this approach resulted in a
pack size of 0 because `getType()->containsUnexpandedParameterPack()`
returns `false`. After extensive testing, it appears that the correct
pack size can only be inferred from `getInit`.
But `getInit` may reference parameters and `init capture` from an outer
lambda, as shown in the following example:
```cpp
auto L = [](auto... z) {
return [... w = z](auto... y) {
// ...
};
};
```
To address this, `addInstantiatedCapturesToScope` in
`LambdaScopeForCallOperatorInstantiationRAII` should be called last.
Additionally, `addInstantiatedCapturesToScope` has been modified to only
add `init capture` to the scope. The previous implementation incorrectly
called `MakeInstantiatedLocalArgPack` for other non-init captures
containing packs, resulting in a pack size of 0.
### Impact
This patch affects scenarios where
`LambdaScopeForCallOperatorInstantiationRAII` is passed with
`ShouldAddDeclsFromParentScope = false`, preventing the correct addition
of the current lambda's `init capture` to the scope. There are two main
scenarios for `ShouldAddDeclsFromParentScope = false`:
1. **Constraints**: Sometimes constraints are instantiated in place
rather than delayed. In this case,
`LambdaScopeForCallOperatorInstantiationRAII` does not need to add `init
capture` to the scope.
2. **`noexcept` Expressions**: The expressions inside `noexcept` have
already been transformed, and the packs referenced within have been
expanded. Only `RebuildLambdaInfo` needs to add the expanded captures to
the scope, without requiring `addInstantiatedCapturesToScope` from
`LambdaScopeForCallOperatorInstantiationRAII`.
### Considerations
An alternative approach could involve adding a data structure within the
lambda to record the expanded size of the `init capture` pack. However,
this would increase the lambda's size and require extensive
modifications.
This PR is a prerequisite for implmenting
https://github.com/llvm/llvm-project/issues/61426
* [mlir] Verifier: steal bit to track seen instead of set. (#102626)
Tracking a set containing every block and operation visited can become
very expensive and is unnecessary.
Co-authored-by: Will Dietz <[email protected]>
* [Arm][AArch64][Clang] Respect function's branch protection attributes. (#101978)
Default attributes assigned to all functions according to the command
line parameters. Some functions might have their own attributes and we
need to set or remove attributes accordingly.
Tests are updated to test this scenarios too.
* [AMDGPU][AsmParser][NFC] Remove a misleading comment. (#102604)
The work of ParseRegularReg() should remain to be parsing the register
as it was specified, and not to try translate it to anything else.
It's up to operand predicates to decide on what is and is not an
acceptable register for an operand, including considering its expected
register class, and for the rest of the AsmParser infrastructure to
handle it respectively from there on.
* [MLIR][DLTI][Transform] Introduce transform.dlti.query (#101561)
This transform op makes it possible to query attributes associated to IR
by means of the DLTI dialect.
The op takes both a `key` and a target `op` to perform the query at.
Facility functions automatically find the closest ancestor op which
defines the appropriate DLTI interface or has an attribute implementing
a DLTI interface. By default the lookup uses the data layout interfaces
of DLTI. If the optional `device` parameter is provided, the lookup
happens with respect to the interfaces for TargetSystemSpec and
TargetDeviceSpec.
This op uses new free-standing functions in the `dlti` namespace to not
only look up specifications via the `DataLayoutSpecOpInterface` and on
`ModuleOp`s but also on any ancestor op that has an appropriate DLTI
attribute.
* [llvm] Construct SmallVector<SDValue> with ArrayRef (NFC) (#102578)
* [flang][cuda] Force default allocator in device code (#102238)
* [IR] Add method to GlobalVariable to change type of initializer. (#102553)
With opaque pointers, nothing directly uses the value type, so we can
mutate it if we want. This avoid doing a complicated RAUW dance.
* OpenMPOpt: Remove dead include
* [mlir][bazel] add bazel rule for DLTITransformOps
* [mlir][vector][test] Split tests from vector-transfer-flatten.mlir (#102584)
Move tests that exercise DropUnitDimFromElementwiseOps and
DropUnitDimsFromTransposeOp to a dedicated file.
While these patterns are collected under populateFlattenVectorTransferPatterns
(and are tested via -test-vector-transfer-flatten-patterns), they can actually
be tested without the xfer Ops, and hence the split.
Note, this is mostly just moving tests from one file to another. The only real
change is the removal of the following check-lines:
```mlir
// CHECK-128B-NOT: memref.collapse_shape
```
These were added specifically to check the "flattening" logic (which introduces
`memref.collapse_shape`). However, these tests were never meant to test that
logic (in fact, that's the reason I am moving them to a different file) and
hence are being removed as copy&paste errors.
I also removed the following TODO:
```mlir
/// TODO: Potential duplication with tests from:
/// * "vector-dropleadunitdim-transforms.mlir"
/// * "vector-transfer-drop-unit-dims-patterns.mlir"
```
I've checked what patterns are triggered in those test files and neither
DropUnitDimFromElementwiseOps nor DropUnitDimsFromTransposeOp does.
* [X86] pr57673.ll - generate MIR test checks
* Revert "[MLIR][DLTI][Transform] Introduce transform.dlti.query (#101561)"
This reverts commit 8f21ff9bd89fb7c8bbfdc4426b65dcd9ababf3ce.
Crashed CI builds
* [msan] Support vst{2,3,4}_lane instructions (#101215)
This generalizes MSan's Arm NEON vst support, to include the
lane-specific variants.
This also updates the test from
https://github.com/llvm/llvm-project/pull/100645.
* [mlir][bazel] revert bazel rule change for DLTITransformOps
* [libc][math][c23] Add fadd{l,f128} C23 math functions (#102531)
Co-authored-by: OverMighty <[email protected]>
* [AMDGPU] Move `AMDGPUAttributorPass` to full LTO post link stage (#102086)
Currently `AMDGPUAttributorPass` is registered in default optimizer
pipeline.
This will allow the pass to run in default pipeline as well as at
thinLTO post
link stage. However, it will not run in full LTO post link stage. This
patch
moves it to full LTO.
* [asan] Switch allocator to dynamic base address (#98511)
This ports a fix from memprof (https://github.com/llvm/llvm-project/pull/98510), which has a shadow mapping that is similar to ASan (8 bytes of shadow memory per 64 bytes of app memory). This patch changes the allocator to dynamically choose a base address, as suggested by Vitaly for memprof. This simplifies ASan's #ifdef's and avoids potential conflict in the event that ASan were to switch to a dynamic shadow offset in the future [1].
[1] Since shadow memory is mapped before the allocator is mapped:
- dynamic shadow and fixed allocator (old memprof): could fail if
"unlucky" (e.g., https://lab.llvm.org/buildbot/#/builders/66/builds/1361/steps/17/logs/stdio)
- dynamic shadow and dynamic allocator (HWASan; current memprof): always works
- fixed shadow and fixed allocator (current ASan): always works, if
constants are carefully chosen
- fixed shadow and dynamic allocator (ASan with this patch): always works
* [Clang] Add env var for nvptx-arch/amdgpu-arch timeout (#102521)
When working on very busy systems, check-offload frequently fails many
tests with this diagnostic:
```
clang: error: cannot determine amdgcn architecture: /tmp/llvm/build/bin/amdgpu-arch: Child timed out: ; consider passing it via '-march'
```
This patch accepts the environment variable
`CLANG_TOOLCHAIN_PROGRAM_TIMEOUT` to set the timeout. It also increases
the timeout from 10 to 60 seconds.
* [MIPS] Fix missing ANDI optimization (#97689)
1. Add MipsPat to optimize (andi (srl (truncate i64 $1), x), y) to (andi
(truncate (dsrl i64 $1, x)), y).
2. Add MipsPat to optimize (ext (truncate i64 $1), x, y) to (truncate
(dext i64 $1, x, y)).
The assembly result is the same as gcc.
Fixes https://github.com/llvm/llvm-project/issues/42826
* [scudo] Separated committed and decommitted entries. (#101409)
Initially, the LRU list stored all mapped entries with no distinction
between the committed (non-madvise()'d) entries and decommitted
(madvise()'d) entries. Now these two types of entries re separated into
two lists, allowing future cache logic to branch depending on whether or
not entries are committed or decommitted. Furthermore, the retrieval
algorithm will prioritize committed entries over decommitted entries.
Specifically, committed entries that satisfy the MaxUnusedCachePages
requirement are retrieved before optimal-fit, decommitted entries.
This commit addresses the compiler errors raised
[here](https://github.com/llvm/llvm-project/pull/100818#issuecomment-2261043261).
* Suppress spurious warnings due to R_RISCV_SET_ULEB128
llvm-objdump -S issues unnecessary warnings for RISC-V relocatable files
containing .debug_loclists or .debug_rnglists sections with ULEB128
relocations. This occurred because `DWARFObjInMemory` verifies support for all
relocation types, triggering warnings for unsupported ones.
```
% llvm-objdump -S a.o
...
0000000000000000 <foo>:
warning: failed to compute relocation: R_RISCV_SUB_ULEB128, Invalid data was encountered while parsing the file
warning: failed to compute relocation: R_RISCV_SET_ULEB128, Invalid data was encountered while parsing the file
...
```
This change fixes #101544 by declaring support for the two ULEB128
relocation types, silencing the spurious warnings.
---
In DWARF v5 builds, DW_LLE_offset_pair/DW_RLE_offset_pair might be
generated in .debug_loclists/.debug_rnglists with ULEB128 relocations.
They are only read by llvm-dwarfdump to dump section content and verbose
DW_AT_location/DW_AT_ranges output for relocatable files.
The DebugInfoDWARF user (e.g. DWARFDebugRnglists.cpp) calls
`Data.getULEB128` without checking the ULEB128 relocations, as the
unrelocated value holds meaning (refer to the assembler
implementation https://reviews.llvm.org/D157657). This differs from
`.quad .Lfoo`, which requires relocation reading (e.g.
https://reviews.llvm.org/D74404).
Pull Request: https://github.com/llvm/llvm-project/pull/101607
* [GlobalIsel] Combine G_ADD and G_SUB with constants (#97771)
* [libc][newhdrgen]sorted function names in yaml (#102544)
* [NVPTX] support switch statement with brx.idx (reland) (#102550)
Add custom lowering for `BR_JT` DAG nodes to the `brx.idx` PTX
instruction ([PTX ISA 9.7.13.4. Control Flow Instructions: brx.idx]
(https://docs.nvidia.com/cuda/parallel-thread-execution/#control-flow-instructions-brx-idx)).
Depending on the heuristics in DAG selection, `switch` statements may
now be lowered using `brx.idx`.
Note: this fixes the previous issue in #102400 by adding the isBarrier
attribute to BRX_END
* [RISCV] Move PseudoVSET(I)VLI expansion to use PseudoInstExpansion. (#102496)
Instead of expanding in RISCVExpandPseudoInsts, expand during
MachineInstr to MCInst lowering.
We weren't doing anything in expansion other than copying operands.
* [RISCV] Remove riscv-experimental-rv64-legal-i32. (#102509)
This has received no development work in a while and is slowly bit
rotting as new extensions are added.
At the moment, I don't think this is viable without adding a new
invariant that 32 bit values are always in sign extended form like
Mips64 does. We are very dependent on computeKnownBits and
ComputeNumSignBits in SelectionDAG to remove sign extends created for
ABI reasons. If we can't propagate sign bit information through 64-bit
values in SelectionDAG, we can't effectively clean up those extends.
* [clang] Wire -fptrauth-returns to "ptrauth-returns" fn attribute. (#102416)
We already ended up with -fptrauth-returns, the feature macro, the lang
opt, and the actual backend lowering.
The only part left is threading it all through PointerAuthOptions, to
drive the addition of the "ptrauth-returns" attribute to generated
functions.
While there, do minor cleanup on ptrauth-function-attributes.c.
This also adds ptrauth_key_return_address to ptrauth.h.
* Return available function types for BindingDecls. (#102196)
Only return nullptr when we don't have an available QualType.
* [RISCV][GISel] Add missing tests for G_CTLZ/CTTZ instruction selection. NFC
* Revert "[AMDGPU] Move `AMDGPUAttributorPass` to full LTO post link stage (#102086)"
This reverts commit 2fe61a5acf272d6826352ef72f47196b01003fc5.
* [LLVM][rtsan] rtsan transform to preserve CFGAnalyses (#102651)
Follow on to #101232, as suggested in the comments, narrow the scope of
the preserved analyses.
* [clang] Implement -fptrauth-auth-traps. (#102417)
This provides -fptrauth-auth-traps, which at the frontend level only
controls the addition of the "ptrauth-auth-traps" function attribute.
The attribute in turn controls various aspects of backend codegen, by
providing the guarantee that every "auth" operation generated will trap
on failure.
This can either be delegated to the hardware (if AArch64 FPAC is known
to be available), in which case this attribute doesn't change codegen.
Otherwise, if FPAC isn't available, this asks the backend to emit
additional instructions to check and trap on auth failure.
* [libc] Use cpp::numeric_limits in preference to C23 <limits.h> macros (#102665)
This updates some code to consistently use cpp::numeric_limits,
the src/__support polyfill for std::numeric_limits, rather than
the C <limits.h> macros. This is in keeping with the general
C++-oriented style in libc code, and also sidesteps issues about
the new C23 *_WIDTH macros that the compiler-provided header does
not define outside C23 mode.
Bug: https://issues.fuchsia.dev/358196552
* [lldb] Move definition of SBSaveCoreOptions dtor out of header (#102539)
This class is technically not usable in its current state. When you use
it in a simple C++ project, your compiler will complain about an
incomplete definition of SaveCoreOptions. Normally this isn't a problem,
other classes in the SBAPI do this. The difference is that
SBSaveCoreOptions has a default destructor in the header, so the
compiler will attempt to generate the code for the destructor with an
incomplete definition of the impl type.
All methods for every class, including constructors and destructors,
must have a separate implementation not in a header.
* [mlir][ODS] Consistent `cppType` / `cppClassName` usage (#102657)
Make sure that the usage of `cppType` and `cppClassName` of type and
attribute definitions/constraints is consistent in TableGen.
- `cppClassName`: The C++ class name of the type or attribute.
- `cppType`: The fully qualified C++ class name: C++ namespace and C++
class name.
Basically, we should always use the fully qualified C++ class name for
parameter types, return types or template arguments.
Also some minor cleanups.
Fixes #57279.
* [LTO] enable `ObjCARCContractPass` only on optimized build (#101114)
\#92331 tried to make `ObjCARCContractPass` by default, but it caused a
regression on O0 builds and was reverted.
This patch trys to bring that back by:
1. reverts the
[revert](https://github.com/llvm/llvm-project/commit/1579e9ca9ce17364963861517fecf13b00fe4d8a).
2. `createObjCARCContractPass` only on optimized builds.
Tests are updated to refelect the changes. Specifically, all `O0` tests
should not include `ObjCARCContractPass`
Signed-off-by: Peter Rong <[email protected]>
* [mlir][ODS] Verify type constraints in Types and Attributes (#102326)
When a type/attribute is defined in TableGen, a type constraint can be
used for parameters, but the type constraint verification was missing.
Example:
```
def TestTypeVerification : Test_Type<"TestTypeVerification"> {
let parameters = (ins AnyTypeOf<[I16, I32]>:$param);
// ...
}
```
No verification code was generated to ensure that `$param` is I16 or
I32.
When type constraints a present, a new method will generated for types
and attributes: `verifyInvariantsImpl`. (The naming is similar to op
verifiers.) The user-provided verifier is called `verify` (no change).
There is now a new entry point to type/attribute verification:
`verifyInvariants`. This function calls both `verifyInvariantsImpl` and
`verify`. If neither of those two verifications are present, the
`verifyInvariants` function is not generated.
When a type/attribute is not defined in TableGen, but a verifier is
needed, users can implement the `verifyInvariants` function. (This
function was previously called `verify`.)
Note for LLVM integration: If you have an attribute/type that is not
defined in TableGen (i.e., just C++), you have to rename the
verification function from `verify` to `verifyInvariants`. (Most
attributes/types have no verification, in which case there is nothing to
do.)
Depends on #102657.
* [libc] Fix use of cpp::numeric_limits<...>::digits (#102674)
The previous change replaced INT_WIDTH with
cpp::numberic_limits<int>::digits, but these don't have the same
value. While INT_WIDTH == UINT_WIDTH, not so for ::digits, so
use cpp::numberic_limits<unsigned int>::digits et al instead for
the intended effects.
Bug: https://issues.fuchsia.dev/358196552
* [SandboxIR] Implement the InsertElementInst class (#102404)
Heavily based on work by @vporpo.
* [flang][cuda] Convert cuf.alloc for box to fir.alloca in device context (#102662)
In device context managed memory is not available so it makes no sense
to allocate the descriptor using it. Fall back to fir.alloca as it is
handled well in device code.
cuf.free is just dropped.
* [libc] Clean up remaining use of *_WIDTH macros in printf (#102679)
The previous change missed the second spot doing the same thing.
Bug: https://issues.fuchsia.dev/358196552
* [flang][cuda] Fix lib dependency
* [mlir][bazel] add missing td dependency in mlir-tblgen test
* [mlir] Add support for parsing nested PassPipelineOptions (#101118)
- Added a default parsing implementation to `PassOptions` to allow
`Option`/`ListOption` to wrap PassOption objects. This is helpful when
creating meta-pipelines (pass pipelines composed of pass pipelines).
- Updated `ListOption` printing to enable round-tripping the output of
`dump-pass-pipeline` back into `mlir-opt` for more complex structures.
* [NVPTX][NFC] Update tests to use bfloat type (#101493)
Intrinsics are defined with a bfloat type as of commit
250f2bb2c6a9c288faeb821585e9394697c561d8, not i16 and i32 storage types.
As such declarations are no longer needed once the correct types are
used.
* [mlir][bazel] remove extra blanks in mlir-tblgen test
* [SandboxIR] Clean up tracking code with the help of emplaceIfTracking() (#102406)
This patch introduces Tracker::emplaceIfTracking(), a wrapper of Tracker::track() that will conditionally create the change object if tracking is enabled.
This patch also removes the `Parent` member field of `IRChangeBase`.
* [CodeGen][NFCI] Don't re-implement parts of ASTContext::getIntWidth (#101765)
ASTContext::getIntWidth returns 1 if isBooleanType(), and falls back on
getTypeSize in the default case, which itself just returns the Width
from getTypeInfo's returned struct, so can be used in all cases here,
not just for _BitInt types.
* [UnitTests] Convert a test to use opaque pointers (#102668)
* [compiler-rt][NFC] Replace environment variable with %t (#102197)
Certain tests within the compiler-rt subproject encountered "command not
found" errors when using lit's internal shell, particularly when trying
to use the `DIR` environment variable. When checking with the command
`LIT_USE_INTERNAL_SHELL=1 ninja check-compiler-rt`, I encountered the
following error:
```
********************
Testing:
FAIL: SanitizerCommon-ubsan-i386-Linux :: sanitizer_coverage_trace_pc_guard-init.cpp (146 of 9570)
******************** TEST 'SanitizerCommon-ubsan-i386-Linux :: sanitizer_coverage_trace_pc_guard-init.cpp' FAILED ********************
Exit Code: 127
Command Output (stdout):
--
# RUN: at line 5
DIR=/usr/local/google/home/harinidonthula/llvm-project/build/runtimes/runtimes-bins/compiler-rt/test/sanitizer_common/ubsan-i386-Linux/Output/sanitizer_coverage_trace_pc_guard-init.cpp.tmp_workdir
# executed command: DIR=/usr/local/google/home/harinidonthula/llvm-project/build/runtimes/runtimes-bins/compiler-rt/test/sanitizer_common/ubsan-i386-Linux/Output/sanitizer_coverage_trace_pc_guard-init.cpp.tmp_workdir
# .---command stderr------------
# | 'DIR=/usr/local/google/home/harinidonthula/llvm-project/build/runtimes/runtimes-bins/compiler-rt/test/sanitizer_common/ubsan-i386-Linux/Output/sanitizer_coverage_trace_pc_guard-init.cpp.tmp_workdir': command not found
# `-----------------------------
# error: command failed with exit status: 127
```
In this patch, I resolved these issues by removing the use of the `DIR`
environment variable. Instead, the tests now directly utilize
`%t_workdir` for managing temporary directories. Additionally, I
simplified the tests by embedding the clang command arguments directly
into the test scripts, which avoids complications with environment
variable expansion under lit's internal shell.
This fix ensures that the tests run smoothly with lit's internal shell
and prevents the "command not found" errors, improving the reliability
of the test suite when executed in this environment.
fixes: #102395
[link to
RFC](https://discourse.llvm.org/t/rfc-enabling-the-lit-internal-shell-by-default/80179)
* [TargetLowering] Handle vector types in expandFixedPointMul (#102635)
In TargetLowering::expandFixedPointMul when expanding fixed point
multiplication, and when using a widened MUL as strategy for the
lowering, there was a bug resulting in assertion failures like this:
Assertion `VT.isVector() == N1.getValueType().isVector() &&
"SIGN_EXTEND result type type should be vector iff the operand "
"type is vector!"' failed.
Problem was that we did not consider that VT could be a vector type
when setting up the WideVT. This patch should fix that bug.
* [libc] Fix CFP long double and add tests (#102660)
The previous patch removing the fenv requirement for str to float had an
error that got missed due to a lack of tests. This patch fixes the issue
and adds tests, as well as updating the existing tests.
* [libc] Moved range_reduction_double ifdef statement (#102659)
Sin/cos/tan fuzzers were having issues with ONE_TWENTY_EIGHT_OVER_PI, so
the LIBC_TARGET_CPU_HAS_FMA ifdef statement got moved from the
sin/cos/tan .cpp files to the range_reduction_double_common.cpp file.
* [SandboxIR][NFC] Use Tracker.emplaceIfTracking()
This patch replaces some of the remaining uses of Tracker::track() to
Tracker::emplaceIfTracking().
* [nsan] Make #include more conventional
* [ThinLTO]Clean up 'import-assume-unique-local' flag. (#102424)
While manual compiles can specify full file paths and build automation
tools use full, unique paths in practice, it's not clear whether it's a
general good practice to enforce full paths (fail a build if relative
paths are used).
`NumDefs == 1` condition [1] should hold true for many internal-linkage
vtables as long as full paths are indeed used to salvage the marginal
performance when local-linkage vtables are imported due to indirect
reference.
https://github.com/llvm/llvm-project/pull/100448#discussion_r1692068402
has more details.
[1]
https://github.com/llvm/llvm-project/pull/100448/files#diff-e7cb370fee46f0f773f2b5429dfab36b75126d3909ae98ee87ff3d0e3f75c6e9R215
* [SandboxIR][NFC] SingleLLVMInstructionImpl class (#102687)
This patch introduces the SingleLLVMInstructionImpl class which
implements a couple of functions shared across all Instructions that map
to a single LLVM Instructions. This avoids code replication.
* [AMDGPU][Attributor] Add a pass parameter `closed-world` for AMDGPUAttributor pass (#101760)
* FIX: Remove unused private data member `HasWholeProgramVisibility` in `AMDGPU.h`
* AMDGPU/NewPM: Port SIAnnotateControlFlow to new pass manager (#102653)
Does not yet add it to the pass pipeline. Somehow it causes
2 tests to assert in SelectionDAG, in functions without any
control flow.
* AMDGPU/NewPM: Port AMDGPUAnnotateUniformValues to new pass manager (#102654)
* AMDGPU/NewPM: Port SILowerI1Copies to new pass manager (#102663)
* [nsan] GetShadowAddrFor: Use (const) void * to decrease the number of casts
* [msan] Use namespace qualifier. NFC
nsan will port msan_allocator.cpp and msan_thread.cpp. Clean up the two
files first.
* [llvm] Construct SmallVector with ArrayRef (NFC) (#102712)
Without this patch, the constructor arguments come from
SmallVectorImpl, not ArrayRef. This patch switches them to ArrayRef
so that we can construct SmallVector with a single argument.
Note that LLVM Programmer’s Manual prefers ArrayRef to SmallVectorImpl
for flexibility.
* [AArch64] Construct SmallVector<SDValue> with ArrayRef (NFC) (#102713)
* [mlir] Use llvm::is_contained (NFC) (#102714)
* AMDGPU/NewPM: Initialize class member
After #102654
* [TargetLowering] Use APInt::isSubsetOf to simplify an expression. NFC
* [clang] Use llvm::is_contained (NFC) (#102720)
* [llvm-objdump,test] Fix source-interleave.ll when /proc/self/cwd is unavailable
e.g. on Mach-O
* [clang][Interp] Start implementing unions and changing the active member (#102723)
* [libc++] re-enable clang-tidy in the CI and fix any issues (#102658)
It looks like we've accidentally disabled clang-tidy in the CI. This
re-enables it and fixes the issues accumulated while it was disabled.
* [clang][Interp] Improve "in call to" call argument printing (#102735)
Always go through toAPValue() first and pretty-print that. In the
future, I think we could get rid of the individual toDiagnosticString()
implementations. This way we also get the correct printing for floats.
* [clang][Interp] Do not call dtors of union members (#102739)
* [clang][Interp] Handle nested unions (#102743)
* [Polly] Use separate DT/LI/SE for outlined subfn. NFC. (#102460)
DominatorTree, LoopInfo, and ScalarEvolution are function-level analyses
that expect to be called only on instructions and basic blocks of the
function they were original created for. When Polly outlined a parallel
loop body into a separate function, it reused the same analyses seemed
to work until new checks to be added in #101198.
This patch creates new analyses for the subfunctions. GenDT, GenLI, and
GenSE now refer to the analyses of the current region of code. Outside
of an outlined function, they refer to the same analysis as used for the
SCoP, but are substituted within an outlined function.
Additionally to the cross-function queries of DT/LI/SE, we must not
create SCEVs that refer to a mix of expressions for old and generated
values. Currently, SCEVs themselves do not "remember" which
ScalarEvolution analysis they were created for, but mixing them is just
as unexpected as using DT/LI across function boundaries. Hence
`SCEVLoopAddRecRewriter` was combined into `ScopExpander`.
`SCEVLoopAddRecRewriter` only replaced induction variables but left
SCEVUnknowns to reference the old function. `SCEVParameterRewriter`
would have done so but its job was effectively superseded by
`ScopExpander`, and now also `SCEVLoopAddRecRewriter`. Some issues
persist put marked with a FIXME in the code. Changing them would
possibly cause this patch to be not NFC anymore.
* [libc] Fix `scablnf16` using `float16` instead of `_Float16`
* [LLD][NFC] Don't use x64 import library for x86 target in safeseh-md tests. (#102736)
Use llvm-lib to generate input library instead of a binary blob.
* [LLD][NFC] Make InputFile::getMachineType const. (#102737)
* [mlir][vector] Use `DenseI64ArrayAttr` in vector.multi_reduction (#102637)
This prevents some unnecessary conversions to/from int64_t and
IntegerAttr.
* [clang][Interp] Only zero-init first union member (#102744)
Zero-initializing all of them accidentally left the last member active.
Only initialize the first one.
* [Clang][Sema][OpenMP] Allow `thread_limit` to accept multiple expressions (#102715)
* [clang][Interp] Ignore unnamed bitfields when zeroing records (#102749)
Including unions, where this is more important.
* [clang][Interp] Fix activating via indirect field initializers (#102753)
Pointer::activate() propagates up anyway, so that is handled. But we
need to call activate() in any case since the parent might not be a
union, but the activate() is still needed. Always call it and hope that
the InUnion flag takes care of the potential performance problems.
* [NFC] Fix TableGen include guards to match paths (#102746)
- Fix include guards for headers under utils/TableGen to match their
paths.
* [GISel] Handle more opcodes in constant_fold_binop (#102640)
Update the list of opcodes handled by the constant_fold_binop combine to
match the ones that are folded in CSEMIRBuilder::buildInstr.
* [Support] Assert that DomTree nodes share parent (#101198)
A dominance query of a block that is in a different function is
ill-defined, so assert that getNode() is only called for blocks that are
in the same function.
There are two cases, where this behavior did occur. LoopFuse didn't
explicitly do this, but didn't invalidate the SCEV block dispositions,
leaving dangling pointers to free'ed basic blocks behind, causing
use-after-free. We do, however, want to be able to dereference basic
blocks inside the dominator tree, so that we can refer to them by a
number stored inside the basic block.
* [Serialization] Fix a warning
This patch fixes:
clang/lib/Serialization/ASTReader.cpp:11484:13: error: unused
variable '_' [-Werror,-Wunused-variable]
* [Serialization] Use traditional for loops (NFC) (#102761)
The use of _ requires either:
- (void)_ and curly braces, or
- [[maybe_unused]].
For simple repetitions like these, we can use traditional for loops
for readable warning-free code.
* [clang][Interp] Handle union copy/move ctors (#102762)
They don't have a body and we need to implement them ourselves. Use the
Memcpy op to do that.
* [sanitizer,test] Restore -fno-sized-deallocation coverage
-fsized-deallocation was recently made the default for C++17 onwards
(#90373). While here, remove unneeded -faligned-allocation.
* [dfsan] Use namespace qualifier and internalize accidentally exported functions. NFC
* [Utils] Add new merge-release-pr.py script. (#101630)
This script helps the release managers merge backport PR's.
It does the following things:
* Validate the PR, checks approval, target branch and many other things.
* Rebases the PR
* Checkout the PR locally
* Pushes the PR to the release branch
* Deletes the local branch
I have found the script very helpful to merge the PR's.
* [DFAJumpThreading] Rewrite the way paths are enumerated (#96127)
I tried to add a limit to number of blocks visited in the paths()
function but even with a very high limit the transformation coverage was
being reduced.
After looking at the code it seemed that the function was trying to
create paths of the form
`SwitchBB...DeterminatorBB...SwitchPredecessor`. This is inefficient
because a lot of nodes in those paths (nodes before DeterminatorBB)
would be irrelevant to the optimization. We only care about paths of the
form `DeterminatorBB_Pred DeterminatorBB...SwitchBB`. This weeds out a
lot of visited nodes.
In this patch I have added a hard limit to the number of nodes visited
and changed the algorithm for path calculation. Primarily I am
traversing the use-def chain for the PHI nodes that define the state. If
we have a hole in the use-def chain (no immediate predecessors) then I
call the paths() function.
I also had to the change the select instruction unfolding code to insert
redundant one input PHIs to allow the use of the use-def chain in
calculating the paths.
The test suite coverage with this patch (including a limit on nodes
visited) is as follows:
Geomean diff:
dfa-jump-threading.NumTransforms: +13.4%
dfa-jump-threading.NumCloned: +34.1%
dfa-jump-threading.NumPaths: -80.7%
Compile time effect vs baseline (pass enabled by default) is mostly
positive:
https://llvm-compile-time-tracker.com/compare.php?from=ad8705fda25f64dcfeb6264ac4d6bac36bee91ab&to=5a3af6ce7e852f0736f706b4a8663efad5bce6ea&stat=instructions:u
Change-Id: I0fba9e0f8aa079706f633089a8ccd4ecf57547ed
* [dfsan] Use namespace qualifier. NFC
* [Clang][CodeGen] Fix bad codegen when building Clang with latest MSVC (#102681)
Before this PR, when using the latest MSVC `Microsoft (R) C/C++
Optimizing Compiler Version 19.40.33813 for x64` one of the Clang unit
test used to fail: `CodeGenObjC/gnustep2-direct-method.m`, see full
failure log:
[here](https://github.com/llvm/llvm-project/pull/100517#issuecomment-2266269490).
This PR temporarily shuffles around the code to make the MSVC inliner/
optimizer happy and avoid the bug.
MSVC bug report:
https://developercommunity.visualstudio.com/t/Bad-code-generation-when-building-LLVM-w/10719589?port=1025&fsid=e572244a-cde7-4d75-a73d-9b8cd94204dd
* [clang-format] Add BreakBinaryOperations configuration (#95013)
By default, clang-format packs binary operations, but it may be
desirable to have compound operations be on individual lines instead of
being packed.
This PR adds the option `BreakBinaryOperations` to break up large
compound binary operations to be on one line each.
This applies to all logical and arithmetic/bitwise binary operations
Maybe partially addresses #79487 ?
Closes #58014
Closes #57280
* [clang-format] Fix a serious bug in `git clang-format -f` (#102629)
With the --force (or -f) option, git-clang-format wipes out input files
excluded by a .clang-format-ignore file if they have unstaged changes.
This patch adds a hidden clang-format option --list-ignored that lists
such excluded files for git-clang-format to filter out.
Fixes #102459.
* [llvm-exegesis][unittests] Also disable SubprocessMemoryTest on SPARC (#102755)
Three `llvm-exegesis` tests
```
LLVM-Unit :: tools/llvm-exegesis/./LLVMExegesisTests/SubprocessMemoryTest/DefinitionFillsCompletely
LLVM-Unit :: tools/llvm-exegesis/./LLVMExegesisTests/SubprocessMemoryTest/MultipleDefinitions
LLVM-Unit :: tools/llvm-exegesis/./LLVMExegesisTests/SubprocessMemoryTest/OneDefinition
```
`FAIL` on Linux/sparc64 like
```
llvm/unittests/tools/llvm-exegesis/X86/SubprocessMemoryTest.cpp:68: Failure
Expected equality of these values:
SharedMemoryMapping[I]
Which is: '\0'
ExpectedValue[I]
Which is: '\xAA' (170)
```
It seems like this test only works on little-endian hosts: three
sub-tests are already disabled on powerpc and s390x (both big-endian),
and the fourth is additionally guarded against big-endian hosts (making
the other guards unnecessary).
However, since it's not been analyzed if this is really an endianess
issue, this patch disables the whole test on powerpc and s390x as before
adding sparc to the mix.
Tested on `sparc64-unknown-linux-gnu` and `x86_64-pc-linux-gnu`.
* [Analysis] Use llvm::set_is_subset (NFC) (#102766)
* [LegalizeTypes] Use APInt::getLowBitsSet instead of getAllOnes+zext. NFC
* Revert "[Support] Assert that DomTree nodes share parent" (#102780)
Reverts llvm/llvm-project#101198
Breaks multiple bots:
https://lab.llvm.org/buildbot/#/builders/72/builds/2103
https://lab.llvm.org/buildbot/#/builders/164/builds/1909
https://lab.llvm.org/buildbot/#/builders/66/builds/2706
* Revert "[clang][Interp] Improve "in call to" call argument printing" (#102785)
Reverts llvm/llvm-project#102735
Breaks https://lab.llvm.org/buildbot/#/builders/52/builds/1496
* [RISCV] Add IR tests for bf16 vmerge and vmv.v.v. NFC (#102775)
* [InstCombine] Use llvm::set_is_subset (NFC) (#102778)
* [profgen][NFC] Pass parameter as const_ref
Pass `ProbeNode` parameter of `trackInlineesOptimizedAway` as const
reference.
Reviewers: wlei-llvm, WenleiHe
Reviewed By: WenleiHe
Pull Request: https://github.com/llvm/llvm-project/pull/102787
* [MC][profgen][NFC] Expand auto for MCDecodedPseudoProbe
Expand autos in select places in preparation to #102789.
Reviewers: dcci, maksfb, WenleiHe, rafaelauler, ayermolo, wlei-llvm
Reviewed By: WenleiHe, wlei-llvm
Pull Request: https://github.com/llvm/llvm-project/pull/102788
* [Target] Construct SmallVector<MachineMemOperand *> with ArrayRef (NFC) (#102779)
* [clang][Interp] Properly adjust instance pointer in virtual calls (#102800)
`getDeclPtr()` will not just return what we want, but in this case a
pointer to the `vu` local variable.
* [clang][Interp][NFC] Add a failing test case (#102801)
* [Docs] Update meetup contact mail address (#99321)
Arnaud is no longer active.
* [NFC][libclang/python] Fix code highlighting in release notes (#102807)
This corrects a release note introduced in #98745
* [VPlan] Move VPWidenLoadRecipe::execute to VPlanRecipes.cpp (NFC).
Move VPWidenLoadRecipe::execute to VPlanRecipes.cpp in line with
other ::execute implementations that don't depend on anything
defined in LoopVectorization.cpp
* AMDGPU: Try to add some more amdgpu-perf-hint tests (#102644)
This test has hardly any test coverage, and no IR tests. Add a few
more tests involving calls, and add some IR checks. This pass needs
a lot of work to improve the test coverage, and to actually use
the cost model instead of making up its own accounting scheme.
* NewPM/AMDGPU: Port AMDGPUPerfHintAnalysis to new pass manager (#102645)
This was much more difficult than I anticipated. The pass is
not in a good state, with poor test coverage. The legacy PM
does seem to be relying on maintaining the map state between
different SCCs, which seems bad. The pass is going out of its
way to avoid putting the attributes it introduces onto non-callee
functions. If it just added them, we could use them directly
instead of relying on the map, I would think.
The NewPM path uses a ModulePass; I'm not sure if we should be
using CGSCC here but there seems to be some missing infrastructure
to support backend defined ones.
* [CI][libclang] Add PR autolabeling for libclang (#102809)
This automatically adds the `clang:as-a-library` label on PRs for the C
and Python bindings and the libclang library
---------
Co-authored-by: Vlad Serebrennikov <[email protected]>
* [clang-tidy] Fix modernize-use-std-format lit test signature (#102759)
My fix for my original fix of issue #92896 in
666d224248707f373577b5b049b5b0229100006c modified the function signature
for fmt::sprintf to more accurately match the real implementation in
libfmt but failed to do the same for absl::StrFormat. The latter fix
applied equally well to absl::StrFormat so it's important that its test
verifies that the bug is fixed too.
* [LV] Collect profitable VFs in ::getBestVF. (NFCI)
Move collectig profitable VFs to ::getBestVF, in preparation for
retiring selectVectorizationFactor.
* [LV] Adjust test for #48188 to use AVX level closer to report.
Update AVX level for https://github.com/llvm/llvm-project/issues/48188
to be closer to the one used in the preproducer.
* [LV] Regenerate check lines in preparation for #99808.
Regenerate check lines for test to avoid unrelated changes in
https://github.com/llvm/llvm-project/pull/99808.
* [llvm] Construct SmallVector with ArrayRef (NFC) (#102799)
* [RFC][GlobalISel] InstructionSelect: Allow arbitrary instruction erasure (#97670)
See https://discourse.llvm.org/t/rfc-globalisel-instructionselect-allow-arbitrary-instruction-erasure
* [gn build] Port d2336fd75cc9
* [GlobalISel] Combiner: Install Observer into MachineFunction
The Combiner doesn't install the Observer into the MachineFunction.
This probably went unnoticed, because MachineFunction::getObserver() is
currently only used in constrainOperandRegClass(), but this might cause
issues down the line.
Pull Request: https://github.com/llvm/llvm-project/pull/102156
* [clang][Interp] Propagate InUnion flag to base classes (#102804)
* [GlobalISel] Don't remove from unfinalized GISelWorkList
Remove a hack from GISelWorkList caused by the Combiner removing
instructions from an unfinalized GISelWorkList during the DCE phase.
This is in preparation for larger changes to the WorkListMaintainer.
Pull Request: https://github.com/llvm/llvm-project/pull/102158
* [LLD][COFF] Validate import library machine type. (#102738)
* [LegalizeTypes][RISCV] Use SExtOrZExtPromotedOperands to promote operands for USUBSAT. (#102781)
It doesn't matter which extend we use to promote the operands. Use
whatever is the most efficient.
The custom handler for RISC-V was using SIGN_EXTEND when the Zbb
extension is enabled so we no longer need that.
* [nsan] Add NsanThread and clear static TLS shadow
On thread creation, asan/hwasan/msan/tsan unpoison the thread stack and
static TLS blocks in case the blocks reuse previously freed memory that
is possibly poisoned. glibc nptl/allocatestack.c allocates thread stack
using a hidden, non-interceptable function.
nsan is similar: the shadow types for the thread stack and static TLS
blocks should be set to unknown, otherwise if the static TLS blocks
reuse previous shadow memory, and `*p += x` instead of `*p = x` is used
for the first assignment, the mismatching user and shadow memory could
lead to false positives.
NsanThread is also needed by the next patch to use the sanitizer
allocator.
Pull Request: https://github.com/llvm/llvm-project/pull/102718
* Bump CI container clang version to 18.1.8 (#102803)
This patch bumps the CI container LLVM version to 18.1.8. This should've
been bumped a while ago, but I just noticed that it was out of date.
This also allows us to drop a patch that we manually had to add as it is
by default included in v18.
* [mlir][affine] Fix crash in mlir::affine::getForInductionVarOwner() (#102625)
This change fixes a crash when getOwner()->getParent() is a nullptr
* [LV] Support generating masks for switch terminators. (#99808)
Update createEdgeMask to created masks where the terminator in Src is a
switch. We need to handle 2 separate cases:
1. Dst is not the default desintation. Dst is reached if any of the
cases with destination == Dst are taken. Join the conditions for each
case where destination == Dst using a logical OR.
2. Dst is the default destination. Dst is reached if none of the cases
with destination != Dst are taken. Join the conditions for each case
where the destination is != Dst using a logical OR and negate it.
Edge masks are created for every destination of cases and/or
default when requesting a mask where the source is a switch.
Fixes https://github.com/llvm/llvm-project/issues/48188.
PR: https://github.com/llvm/llvm-project/pull/99808
* Make msan_allocator.cpp more conventional. NFC
nsan will port msan_allocator.cpp.
* [msan] Remove unneeded nullness CHECK
The pointer will immediate be dereferenced.
* [lldb] Construct SmallVector with ArrayRef (NFC) (#102793)
* [LV] Handle SwitchInst in ::isPredicatedInst.
After f0df4fbd0c7b, isPredicatedInst needs to handle SwitchInst as well.
Handle it the same as BranchInst.
This fixes a crash in the newly added test and improves the results for
one of the existing tests in predicate-switch.ll
Should fix https://lab.llvm.org/buildbot/#/builders/113/builds/2099.
* [CMake] Followup to #102396 and restore old DynamicLibrary symbols behavior (#102671)
Followup to #102138 and #102396, restore more old behavior to fix
ppc64-aix bot.
* [NFC] Eliminate top-level "using namespace" from some headers. (#102751)
- Eliminate top-level "using namespace" from some headers.
* libc: Remove `extern "C"` from main declarations (#102825)
This is invalid in C++, and clang recently started warning on it as of
#101853
* Revert "libc: Remove `extern "C"` from main declarations" (#102827)
Reverts llvm/llvm-project#102825
* [rtsan] Make sure rtsan gets initialized on mac (#100188)
Intermittently on my mac I was getting the same nullptr crash in dlsym.
We need to make sure rtsan gets initialized on mac between when the
binary starts running, and the first intercepted function is called.
Until that point we should use the DlsymAllocator.
* [lldb] Silence warning
This fixes:
```
[6831/7617] Building CXX object
tools\lldb\source\Target\CMakeFiles\lldbTarget.dir\ThreadPlanSingleThreadTimeout.cpp.obj
C:\src\git\llvm-project\lldb\source\Target\ThreadPlanSingleThreadTimeout.cpp(66)
: warning C4715:
'lldb_private::ThreadPlanSingleThreadTimeout::StateToString': not all
control paths return a value
```
* [openmp][runtime] Silence warnings
This fixes several of those when building with MSVC on Windows:
```
[3625/7617] Building CXX object
projects\openmp\runtime\src\CMakeFiles\omp.dir\kmp_affinity.cpp.obj
C:\src\git\llvm-project\openmp\runtime\src\kmp_affinity.cpp(2637):
warning C4062: enumerator 'KMP_HW_UNKNOWN' in switch of enum 'kmp_hw_t'
is not handled
C:\src\git\llvm-project\openmp\runtime\src\kmp.h(628): note: see
declaration of 'kmp_hw_t'
```
* [compiler-rt] Silence warnings
This fixes a few of these warnings, when building with Clang ToT on
Windows:
```
[622/7618] Building CXX object
projects\compiler-rt\lib\sanitizer_common\CMakeFiles\RTSanitizerCommonSymbolizer.x86_64.dir\sanitizer_symbolizer_win.cpp.obj
C:\src\git\llvm-project\compiler-rt\lib\sanitizer_common\sanitizer_symbolizer_win.cpp(74,3):
warning: cast from 'FARPROC' (aka 'long long (*)()') to
'decltype(::StackWalk64) *' (aka 'int (*)(unsigned long, void *, void *,
_tagSTACKFRAME64 *, void *, int (*)(void *, unsigned long long, void *,
unsigned long, unsigned long *), void *(*)(void *, unsigned long long),
unsigned long long (*)(void *, unsigned long long), unsigned long long
(*)(void *, void *, _tagADDRESS64 *))') converts to incompatible
function type [-Wcast-function-type-mismatch]
```
This is similar to https://github.com/llvm/llvm-project/pull/97905
* [lldb] Silence warning
This fixes the following warning, when building with Clang ToT on
Windows:
```
[6668/7618] Building CXX object
tools\lldb\source\Plugins\Process\Windows\Common\CMakeFiles\lldbPluginProcessWindowsCommon.dir\TargetThreadWindows.cpp.obj
C:\src\git\llvm-project\lldb\source\Plugins\Process\Windows\Common\TargetThreadWindows.cpp(182,22):
warning: cast from 'FARPROC' (aka 'long long (*)()') to
'GetThreadDescriptionFunctionPtr' (aka 'long (*)(void *, wchar_t **)')
converts to incompatible function type [-Wcast-function-type-mismatch]
```
This is similar to: https://github.com/llvm/llvm-project/pull/97905
* [lldb] Fix dangling expression
This fixes the following:
```
[6603/7618] Building CXX object
tools\lldb\source\Plugins\ObjectFile\PECOFF\CMakeFiles\lldbPluginObjectFilePECOFF.dir\WindowsMiniDump.cpp.obj
C:\src\git\llvm-project\lldb\source\Plugins\ObjectFile\PECOFF\WindowsMiniDump.cpp(29,25):
warning: object backing the pointer will be destroyed at the end of the
full-expression [-Wdangling-gsl]
29 | const auto &outfile = core_options.GetOutputFile().value();
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
1 warning generated.
```
* [builtins] Rename sysauxv to getauxval to reflect the function called. NFCI (#102796)
* [mlir] Fix build after ec50f5828f25 (#101021)
This commit fixes what appears to be invalid C++ -- a lambda capturing a
variable before it is declared. The code compiles with GCC and Clang but
not MSVC.
* [LoopVectorize][X86][AMDLibm] Add Missing AMD LibM trig vector intrinsics (#101125)
Adding the following linked to their docs:
-
[amd_vrs16_acosf](https://github.com/amd/aocl-libm-ose/blob/9c0b67293ba01e509a6308247d82a8f1adfbbc67/scripts/libalm.def#L221)
-
[amd_vrd2_cosh](https://github.com/amd/aocl-libm-ose/blob/9c0b67293ba01e509a6308247d82a8f1adfbbc67/scripts/libalm.def#L124)
-
[amd_vrs16_tanhf](https://github.com/amd/aocl-libm-ose/blob/9c0b67293ba01e509a6308247d82a8f1adfbbc67/scripts/libalm.def#L224)
* [NFC] [C++20] [Modules] Adjust the implementation of wasDeclEmitted to make it more clear
The preivous implementation of wasDeclEmitted may be confusing that
why we need to filter the declaration not from modules. Now adjust the
implementations to avoid the problems.
* Revert "[CMake] Followup to #102396 and restore old DynamicLibrary symbols behavior (#102671)"
This reverts commit 32973b08d8cb02c213d96df453ff323470304645. This fix
doesn't fix the build failure as expected and making few other
configuration broken too.
* [Sanitizer] Make sanitizer passes idempotent (#99439)
This PR changes the sanitizer passes to be idempotent.
When any sanitizer pass is run after it has already been run before,
double instrumentation is seen in the resulting IR. This happens because
there is no check in the pass, to verify if IR has been instrumented
before.
This PR checks if "nosanitize_*" module flag is already present and if
true, return early without running the pass again.
* [mlir][IR] Auto-generate element type verification for VectorType (#102449)
#102326 enables verification of type parameters that are type
constraints. The element type verification for `VectorType` (and maybe
other builtin types in the future) can now be auto-generated.
Also remove redundant error checking in the vector type parser: element
type and dimensions are already checked by the verifier (which is called
from `getChecked`).
Depends on #102326.
* [clang][Interp][NFC] Cleanup CheckActive()
Assert that the given pointer is in a union if it's not active and use a
range-based for loop to find the active field.
* [mlir][linalg] fix linalg.batch_reduce_matmul auto cast (#102585)
Fix the auto-cast of `linalg.batch_reduce_matmul` from `cast_to_T(A *
cast_to_T(B)) + C` to `cast_to_T(A) * cast_to_T(B) + C`
* [clang][Interp][NFC] Move ctor compilation to compileConstructor
In preparation for having a similar function for destructors.
* Revert "[NFC] [C++20] [Modules] Adjust the implementation of wasDeclEmitted to make it more clear"
This reverts commit 4399f2a5ef38df381c2b65052621131890194d59.
This fails with Modules/aarch64-sme-keywords.cppm
* Reapply "[AMDGPU] Always lower s/udiv64 by constant to MUL" (#101942)
Reland #100723, fixing the ARM issue at the cost of a small loss of optimization in `test/CodeGen/AMDGPU/fshr.ll`
Solves #100383
* [clang] Avoid triggering vtable instantiation for C++23 constexpr dtor (#102605)
In C++23 anything can be constexpr, including a dtor of a class whose
members and bases don't have constexpr dtors. Avoid early triggering of
vtable instantiation int this case.
Fixes https://github.com/llvm/llvm-project/issues/102293
* [CMake] Don't pass -DBUILD_EXAMPLES to the build (#102838)
The only use in `opt.cpp` was removed in
d291f1fd094538af705541045c0d9c3ceb85e71d.
* [DataLayout] Move `operator=` to cpp file (NFC) (#102849)
`DataLayout` isn't exactly cheap to copy (448 bytes on a 64-bit host).
Move `operator=` to cpp file to improve compilation time. Also move
`operator==` closer to `operator=` and add a couple of FIXMEs.
* [GlobalISel] Fix implementation of CheckNumOperandsLE/GE
The condition was backwards - it was rejecting when the condition was met.
Fixes #102719
* [VPlan] Mark VPVectorPointer as only using the first part of the ptr.
VPVectorPointerRecipe only uses the first part of the pointer operand,
so mark it accordingly.
Follow-up suggested as part of
https://github.com/llvm/llvm-project/pull/99808.
* [mlir][Transforms] Add missing check in tosa::transpose::verify() (#102099)
The tosa::transpose::verify() should make sure
that the permutation numbers are within the size of
the input array. Otherwise it will cause a cryptic array
out of bound assertion later.Fix #99513.
* [AMDGPU] add missing checks in processBaseWithConstOffset (#102310)
fixes https://github.com/llvm/llvm-project/issues/102231 by inserting
missing checks.
* [InstCombine] Don't change fn signature for calls to declarations (#102596)
transformConstExprCastCall() implements a number of highly dubious
transforms attempting to make a call function type line up with the
function type of the called function. Historically, the main value this
had was to avoid function type mismatches due to pointer type
differences, which is no longer relevant with opaque pointers.
This patch is a step towards reducing the scope of the transform, by
applying it only to definitions, not declarations. For declarations, the
declared signature might not match the actual function signature, e.g.
`void @fn()` is sometimes used as a placeholder for functions with
unknown signature. The implementation already bailed out in some cases
for declarations, but I think it would be safer to disable the transform
entirely.
For the test cases, I've updated some of them to use definitions
instead, so that the test coverage is preserved.
* [llvm][llvm-readobj] Add NT_ARM_FPMR corefile note type (#102594)
This contains the fpmr register which was added in Armv9.5-a. This
register mainly contains controls for fp8 formats.
It was added to the Linux Kernel in
https://github.com/torvalds/linux/commit/4035c22ef7d43a6c00d6a6584c60e902b95b46af.
* [analyzer][NFC] Trivial refactoring of region invalidation (#102456)
This commit removes `invalidateRegionsImpl()`, moving its body to
`invalidateRegions(ValueList Values, ...)`, because it was a completely
useless layer of indirection.
Moreover I'm fixing some strange indentation within this function body
and renaming two variables to the proper `UpperCamelCase` format.
* [VPlan] Replace hard-coded value number in test with pattern.
Make test more robust w.r.t. future changes.
* [NFC][Clang] clang-format a function declaration
* [dwarf2yaml] Correctly emit type and split unit headers (#102471)
(DWARFv5) split units have an extra `dwo_id` field in the header. Type
units have `type_signature` and `type_offset`.
* [LV] Only OR unique edges when creating block-in masks.
This removes redundant ORs of matching masks.
Follow-up to f0df4fbd0c7b to reduce the number of redundant ORs for
masks.
* [KnownBits] Add KnownBits::add and KnownBits::sub helper wrappers. (#99468)
* [clang][analyzer] Remove array bounds check from PointerSubChecker (#102580)
At pointer subtraction only pointers are allowed that point into an
array (or one after the end), this fact was checker by the checker. This
check is now removed because it is a special case of array indexing
error that is handled by different checkers (like ArrayBoundsV2).
* [lldb] Tolerate multiple compile units with the same DWO ID (#100577)
I ran into this when LTO completely emptied two compile units, so they
ended up with the same hash (see #100375). Although, ideally, the
compiler would try to ensure we don't end up with a hash col…
joker-eph
reviewed
Aug 28, 2024
| def ConvertToSPIRVPass : Pass<"convert-to-spirv"> { | ||
| let summary = "Convert to SPIR-V"; | ||
| let description = [{ | ||
| This is a generic pass to convert to SPIR-V. |
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This claims to be a "generic" pass but it seems to me instead to be a "monolithic" pass.
Why didn't we align this on the convert-to-llvm pass design instead?
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@angelz913 talked about this in https://youtu.be/-qoMMrlYvGs?t=436 (starts around the 7m 15s mark). The TL;DR is we didn't know what interfaces to have, and decided to start with a monolithic multi-stage v0 implementation, with the plan to add make it interface-based when gain confidence in this design.
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The TL;DR is we didn't know what interfaces to have
I don't quite understand? Why isn't it just copy the convert-to-llvm one and rename it?
I have strong concerns with in-tree monolithic passes like this: what is the timeline to remove this and migrate to a pluggable one?
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I agree that in-tree monolithic passes arent great, but the change to use interfaces and go to more LLVM based approach is more involved (I dont think it is as simple as "copy the convert-to-llvm and rename it". Angel and Jakub can fill in more details here). I think timeline will depend on how much community involvement we get here. Jakub and Angel are trying to get upstream support flushed out more. So this is a strict improvement anyway. Its probably better to iterate on this in a bit.
FWIW, for conversion to LLVM in IREE we just throw all the conversion patterns into one pass and run them together. I personally find the split of conversion from each dialect to LLVM kind of artificial. Everything needs to be translated to LLVM. Running multiple passes that walk the IR multiple times seems like a waste. But that is a downstream decision and not having monoliths in upstream MLIR is useful.
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I think timeline will depend on how much community involvement we get here.
In this case I would want to see this pass moved to the test folder: I'm not comfortable with monolithic passes alongside the rest of the transformations right now.
FWIW, for conversion to LLVM in IREE we just throw all the conversion patterns into one pass and run them together. I personally find the split of conversion from each dialect to LLVM kind of artificial
I suspect you missed the intent of upstream design: these individual passes are all made that way upstream for testing, the intention has always been that downstream projects create a monolithic pass for their own purpose and don't use the upstream passes as-is (which is why the populatePatterns method are exposed): that's exactly "work as intended".
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but the dependency on the spirv conversion code will have to move over there in some form.
Why would it have to be moved to the runner? The current pattern is that the transformations are made with mlir-opt ahead of invoking the runner (hence why we ended up with a "pure" mlir-cpu-runner).
So we can drop the runner, but it will just make the situation worse).
I think we're talking about different things maybe?
You seem to argue about the need for running some of these tests, while I'm just describing the system architecture of the project, which does not impact in any way which tests we're running.
That is, from a very high-level, the specific runner tool goes away and you do instead something like mlir-opt -pass-pipeline="builtin.module(convert-to-spirv)" %s | mlir-cpu-runner --shared-libs=mlir_vulkan_runtime.so.
(this is a transition we made for the mlir-cuda-runner ~3 years ago, and the Vulkan runner has been a TODO ever since IIUC)
Note that in this model, the test pass is available for the opt tool, the runner does not need to know about the test passes (or any pass).
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Thanks for the clarification, Mehdi.
You seem to argue about the need for running some of these tests, while I'm just describing the system architecture of the project, which does not impact in any way which tests we're running.
Right, that's a good way to put it. From my point of view, what I mostly care about is that we do keep these tests (as in, both the implementation of convert-to-spirv and the e2e .mlir tests) while the cleanup in this area (both gpu-to-spirv and the runner implementation). I think we all aggrege on the end state, so I just want to make sure that we can find a path that allows us to make incremental improvements to get there.
From your perspective, would it be an option to make this a test pass and temporarily have it registered it in the vulkan runner (similar to how they are manually listed in mlir-opt.cpp)? Maybe that's a middle ground, although I'm not sure of how much difference to a pass being a test or not there practically is for other users of mlir.
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From your perspective, would it be an option to make this a test pass and temporarily have it registered it in the vulkan runner (similar to how they are manually listed in mlir-opt.cpp)?
The problem is that we optionally compile the test passes I think? (With -DMLIR_INCLUDE_TESTS=ON).
It may be easier to just keep the pass as-is until we migrate tests from mlir-vulkan-runner to mlir-cpu-runner?
The only thing that makes be nervous is that unless there is a timeline with people making progress on it, we'll still be adding mlir-vulkan-runner based tests multiple years from now. What I'm trying to see is some sort of a "gradient" on the progression of all this (and some timeline), rather than a quick immediate solution.
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OK, let me check internally if we can commit to something more concrete along this axis. Overall, I think we did make a lot of recent progress on the spirv conversion test coverage and general cleanup in this area, but I understand why you'd want to prioritize the runner cleanup next.
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@joker-eph I checked and we will have @andfau-amd work on the mlir runner migration, starting from ~next week.
kuhar
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Aug 28, 2024
#106426) This PR adds an integration test for an argmax kernel with `mlir-vulkan-runner`. This test exercises the `convert-to-spirv` pass (landed in #95942) and demonstrates that we can use SPIR-V ops as "intrinsics" among higher-level dialects. The support for `index` dialect in `mlir-vulkan-runner` is also added.
5c4lar
pushed a commit
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Aug 29, 2024
llvm#106426) This PR adds an integration test for an argmax kernel with `mlir-vulkan-runner`. This test exercises the `convert-to-spirv` pass (landed in llvm#95942) and demonstrates that we can use SPIR-V ops as "intrinsics" among higher-level dialects. The support for `index` dialect in `mlir-vulkan-runner` is also added.
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This PR adds conversion patterns for GPU to the `convert-to-spirv` pass, introduced in llvm#95942. Now the pass is able to convert each `gpu.module` and its ops within a `builtin.module` into a `spirv.module`. **Future Plans** - Use `gpu.launch_func` to invoke kernel from host functions - Potentially integrate into the `mlir-vulkan-runner` for e2e testing
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This PR implements a MVP version of an MLIR lowering pipeline to SPIR-V. The goal of adding this pipeline is to have a better test coverage of SPIR-V compilation upstream, and enable writing simple kernels by hand. The dialects supported in this version include
arith,vector(only 1-D vectors with size 2,3,4,8 or 16),scf,ub,index,funcandmath. New test cases for the pass are also included in this PR.Relevant links
Future plans
gpu,tensor, etc.spirv.funccan only return zero or one values. It might be possible to wrap the return values in aspirv.struct.scf.parallel.