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Miscompile with LoopVectorizer: Incorrect code with disjoint or #81872
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@fhahn I'm not sure what the right fix here is. It looks like we should not vectorize this case. Note that if we convert the |
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Test for miscompile shown in llvm#81872.
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This testcase was added to show miscompile in llvm#81872
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This testcase was added to show miscompile in llvm#81872
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This testcase was added to show miscompile in #81872
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…83821) Dropping disjoint from an OR may yield incorrect results, as some analysis may have converted it to an Add implicitly (e.g. SCEV used for dependence analysis). Instead, replace it with an equivalent Add. This is possible as all users of the disjoint OR only access lanes where the operands are disjoint or poison otherwise. Note that replacing all disjoint ORs with ADDs instead of dropping the flags is not strictly necessary. It is only needed for disjoint ORs that SCEV treated as ADDs, but those are not tracked. There are other places that may drop poison-generating flags; those likely need similar treatment. Fixes #81872 PR: #83821
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…lvm#83821) Dropping disjoint from an OR may yield incorrect results, as some analysis may have converted it to an Add implicitly (e.g. SCEV used for dependence analysis). Instead, replace it with an equivalent Add. This is possible as all users of the disjoint OR only access lanes where the operands are disjoint or poison otherwise. Note that replacing all disjoint ORs with ADDs instead of dropping the flags is not strictly necessary. It is only needed for disjoint ORs that SCEV treated as ADDs, but those are not tracked. There are other places that may drop poison-generating flags; those likely need similar treatment. Fixes llvm#81872 PR: llvm#83821
This issue is closed as fixed but the fix was reverted. |
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This latent bug was exposed through d77067d (improvement of known bits through dominating conditions).
Given this source code snippet:
This should mean lArr[99] is 1 after the loop (it is set when iv is 98). With known bits improved by dominating conditions, we know that we can convert:
tmp7 = add iv, 1
intotmp7 = or disjoint iv, 1
(since iv is known divisible by 2 at that point).When we vectorize this IR, we incorrectly vectorize the code:
Before vectorization:
After vectorization:
Complete snippet transformation here: https://godbolt.org/z/Kvq1zerTs
Which makes a[99] as 0.
Before vectorization, we only did the store if
iv
was divisible by 2.The text was updated successfully, but these errors were encountered: