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For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D135935
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# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT | ||
# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL | ||
# RUN: llvm-mc --disassemble %s -triple=i386 | FileCheck %s --check-prefixes=ATT | ||
# RUN: llvm-mc --disassemble %s -triple=i386 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL | ||
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# ATT: wrmsrns | ||
# INTEL: wrmsrns | ||
0x0f,0x01,0xc6 |
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// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s | ||
// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s | ||
// RUN: llvm-mc -triple i386 --show-encoding %s | FileCheck %s | ||
// RUN: llvm-mc -triple i386 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s | ||
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// CHECK: wrmsrns | ||
// CHECK: encoding: [0x0f,0x01,0xc6] | ||
wrmsrns |