[X86] Introduce more common modern tunings into generic

GCC has updated its generic `-mtune` to haswell. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81616 Update it to match with GCC. Reviewed By: spatel Differential Revision: https://reviews.llvm.org/D118534
llvm · Feb 5, 2022 · 0b7669f · 0b7669f
1 parent 997f2a5
commit 0b7669f
Showing 4 changed files with 10 additions and 6 deletions.
diff --git a/llvm/lib/Target/X86/X86.td b/llvm/lib/Target/X86/X86.td
@@ -1213,12 +1213,16 @@ class ProcModel<string Name, SchedMachineModel Model,
 // NOTE: 64Bit is here as "generic" is the default llc CPU. The X86Subtarget
 // constructor checks that any CPU used in 64-bit mode has Feature64Bit enabled.
 // It has no effect on code generation.
+// NOTE: As a default tuning, "generic" aims to produce code optimized for the
+// most common X86 processors. The tunings might be changed over time. It is
+// recommended to use "x86-64" in lit tests for consistency.
 def : ProcModel<"generic", SandyBridgeModel,
                 [FeatureX87, FeatureCMPXCHG8B, Feature64Bit],
                 [TuningSlow3OpsLEA,
                  TuningSlowDivide64,
-                 TuningSlowIncDec,
                  TuningMacroFusion,
+                 TuningFastScalarFSQRT,
+                 TuningFast15ByteNOP,
                  TuningInsertVZEROUPPER]>;
 
 def : Proc<"i386",            [FeatureX87],

diff --git a/llvm/test/CodeGen/X86/segmented-stacks-dynamic.ll b/llvm/test/CodeGen/X86/segmented-stacks-dynamic.ll
@@ -47,7 +47,7 @@ define i32 @test_basic(i32 %l) #0 {
 ; X86-NEXT:    testl %esi, %esi
 ; X86-NEXT:    je .LBB0_6
 ; X86-NEXT:  # %bb.8: # %false
-; X86-NEXT:    addl $-1, %esi
+; X86-NEXT:    decl %esi
 ; X86-NEXT:    subl $12, %esp
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    calll test_basic@PLT
@@ -103,7 +103,7 @@ define i32 @test_basic(i32 %l) #0 {
 ; X64-NEXT:    testl %ebx, %ebx
 ; X64-NEXT:    je .LBB0_6
 ; X64-NEXT:  # %bb.8: # %false
-; X64-NEXT:    addl $-1, %ebx
+; X64-NEXT:    decl %ebx
 ; X64-NEXT:    movl %ebx, %edi
 ; X64-NEXT:    callq test_basic@PLT
 ; X64-NEXT:    jmp .LBB0_7
@@ -157,7 +157,7 @@ define i32 @test_basic(i32 %l) #0 {
 ; X32ABI-NEXT:    testl %ebx, %ebx
 ; X32ABI-NEXT:    je .LBB0_6
 ; X32ABI-NEXT:  # %bb.8: # %false
-; X32ABI-NEXT:    addl $-1, %ebx
+; X32ABI-NEXT:    decl %ebx
 ; X32ABI-NEXT:    movl %ebx, %edi
 ; X32ABI-NEXT:    callq test_basic@PLT
 ; X32ABI-NEXT:    jmp .LBB0_7

diff --git a/llvm/test/CodeGen/X86/twoaddr-lea.ll b/llvm/test/CodeGen/X86/twoaddr-lea.ll
@@ -108,7 +108,7 @@ define void @ham() {
 ; CHECK-NEXT:    jne LBB3_9
 ; CHECK-NEXT:  ## %bb.5: ## %bb5
 ; CHECK-NEXT:    ## in Loop: Header=BB3_4 Depth=2
-; CHECK-NEXT:    addq $1, %rdx
+; CHECK-NEXT:    incq %rdx
 ; CHECK-NEXT:    cmpq %rcx, %rdx
 ; CHECK-NEXT:    jl LBB3_4
 ; CHECK-NEXT:    jmp LBB3_3

diff --git a/llvm/test/MC/X86/x86-directive-nops-errors.s b/llvm/test/MC/X86/x86-directive-nops-errors.s
@@ -1,5 +1,5 @@
 # RUN: not llvm-mc -triple i386 %s -filetype=obj -o /dev/null 2>&1 | FileCheck --check-prefix=X86 %s
-# RUN: not llvm-mc -triple=x86_64 %s -filetype=obj -o /dev/null 2>&1 | FileCheck --check-prefix=X64 %s
+# RUN: not llvm-mc -triple=x86_64 -mcpu=x86-64 %s -filetype=obj -o /dev/null 2>&1 | FileCheck --check-prefix=X64 %s
 
 .nops 4, 3
 # X86: :[[@LINE-1]]:1: error: illegal NOP size 3.