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[TypePromotion] Replace Zext to Truncate for the case src bitwidth is…
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… larger

Fix: llvm/llvm-project#58843

Reviewed By: samtebbs

Differential Revision: https://reviews.llvm.org/D137613

(cherry picked from commit 597f444)
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bcl5980 authored and tstellar committed Nov 11, 2022
1 parent 58ba50a commit 6750e34
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Showing 2 changed files with 27 additions and 1 deletion.
8 changes: 7 additions & 1 deletion llvm/lib/CodeGen/TypePromotion.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -569,7 +569,8 @@ void IRPromoter::TruncateSinks() {
void IRPromoter::Cleanup() {
LLVM_DEBUG(dbgs() << "IR Promotion: Cleanup..\n");
// Some zexts will now have become redundant, along with their trunc
// operands, so remove them
// operands, so remove them.
// Some zexts need to be replaced with truncate if src bitwidth is larger.
for (auto *V : Visited) {
if (!isa<ZExtInst>(V))
continue;
Expand All @@ -584,6 +585,11 @@ void IRPromoter::Cleanup() {
<< "\n");
ReplaceAllUsersOfWith(ZExt, Src);
continue;
} else if (ZExt->getSrcTy()->getScalarSizeInBits() > PromotedWidth) {
IRBuilder<> Builder{ZExt};
Value *Trunc = Builder.CreateTrunc(Src, ZExt->getDestTy());
ReplaceAllUsersOfWith(ZExt, Trunc);
continue;
}

// We've inserted a trunc for a zext sink, but we already know that the
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20 changes: 20 additions & 0 deletions llvm/test/Transforms/TypePromotion/AArch64/pr58843.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -mtriple=aarch64 -type-promotion -verify -S %s -o - | FileCheck %s
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"

; Check the case don't crash due to zext source type bitwidth
; larger than dest type bitwidth.
define i1 @test(i8 %arg) {
; CHECK-LABEL: @test(
; CHECK-NEXT: [[EXT1:%.*]] = zext i8 [[ARG:%.*]] to i64
; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[EXT1]], 7
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP2]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%ext1 = zext i8 %arg to i64
%trunc = trunc i64 %ext1 to i3
%ext2 = zext i3 %trunc to i8
%cmp = icmp ne i8 %ext2, 0
ret i1 %cmp
}

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