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[CodeGen] Rename DEBUG_TYPE to match passnames
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Rename missing DEBUG_TYPE "machine-scheduler" from backend files, which were
absent from https://reviews.llvm.org/rL303921.

Differential revision: https://reviews.llvm.org/D35231

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307719 91177308-0d34-0410-b5e6-96231b3b80d8
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Evandro Menezes committed Jul 11, 2017
1 parent b6cfd1a commit fdda7ea
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Showing 11 changed files with 11 additions and 11 deletions.
2 changes: 1 addition & 1 deletion lib/CodeGen/MacroFusion.cpp
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Expand Up @@ -24,7 +24,7 @@
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"

#define DEBUG_TYPE "misched"
#define DEBUG_TYPE "machine-scheduler"

STATISTIC(NumFused, "Number of instr pairs fused");

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2 changes: 1 addition & 1 deletion lib/CodeGen/ScheduleDAGInstrs.cpp
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Expand Up @@ -63,7 +63,7 @@

using namespace llvm;

#define DEBUG_TYPE "misched"
#define DEBUG_TYPE "machine-scheduler"

static cl::opt<bool> EnableAASchedMI("enable-aa-sched-mi", cl::Hidden,
cl::ZeroOrMore, cl::init(false),
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2 changes: 1 addition & 1 deletion lib/Target/AMDGPU/GCNIterativeScheduler.cpp
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Expand Up @@ -17,7 +17,7 @@

using namespace llvm;

#define DEBUG_TYPE "misched"
#define DEBUG_TYPE "machine-scheduler"

namespace llvm {
std::vector<const SUnit*> makeMinRegSchedule(ArrayRef<const SUnit*> TopRoots,
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2 changes: 1 addition & 1 deletion lib/Target/AMDGPU/GCNMinRegStrategy.cpp
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Expand Up @@ -15,7 +15,7 @@

using namespace llvm;

#define DEBUG_TYPE "misched"
#define DEBUG_TYPE "machine-scheduler"

namespace {
class GCNMinRegScheduler {
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2 changes: 1 addition & 1 deletion lib/Target/AMDGPU/GCNRegPressure.cpp
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Expand Up @@ -16,7 +16,7 @@

using namespace llvm;

#define DEBUG_TYPE "misched"
#define DEBUG_TYPE "machine-scheduler"

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD
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2 changes: 1 addition & 1 deletion lib/Target/AMDGPU/GCNSchedStrategy.cpp
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Expand Up @@ -20,7 +20,7 @@
#include "llvm/CodeGen/RegisterClassInfo.h"
#include "llvm/Support/MathExtras.h"

#define DEBUG_TYPE "misched"
#define DEBUG_TYPE "machine-scheduler"

using namespace llvm;

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2 changes: 1 addition & 1 deletion lib/Target/AMDGPU/R600MachineScheduler.cpp
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Expand Up @@ -22,7 +22,7 @@

using namespace llvm;

#define DEBUG_TYPE "misched"
#define DEBUG_TYPE "machine-scheduler"

void R600SchedStrategy::initialize(ScheduleDAGMI *dag) {
assert(dag->hasVRegLiveness() && "R600SchedStrategy needs vreg liveness");
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2 changes: 1 addition & 1 deletion lib/Target/AMDGPU/SIMachineScheduler.cpp
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Expand Up @@ -38,7 +38,7 @@

using namespace llvm;

#define DEBUG_TYPE "misched"
#define DEBUG_TYPE "machine-scheduler"

// This scheduler implements a different scheduling algorithm than
// GenericScheduler.
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2 changes: 1 addition & 1 deletion lib/Target/Hexagon/HexagonMachineScheduler.cpp
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Expand Up @@ -49,7 +49,7 @@ static cl::opt<bool> CheckEarlyAvail("check-early-avail", cl::Hidden,

using namespace llvm;

#define DEBUG_TYPE "misched"
#define DEBUG_TYPE "machine-scheduler"

namespace {
class HexagonCallMutation : public ScheduleDAGMutation {
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2 changes: 1 addition & 1 deletion lib/Target/SystemZ/SystemZHazardRecognizer.cpp
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Expand Up @@ -26,7 +26,7 @@

using namespace llvm;

#define DEBUG_TYPE "misched"
#define DEBUG_TYPE "machine-scheduler"

// This is the limit of processor resource usage at which the
// scheduler should try to look for other instructions (not using the
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2 changes: 1 addition & 1 deletion lib/Target/SystemZ/SystemZMachineScheduler.cpp
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Expand Up @@ -18,7 +18,7 @@

using namespace llvm;

#define DEBUG_TYPE "misched"
#define DEBUG_TYPE "machine-scheduler"

#ifndef NDEBUG
// Print the set of SUs
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