STM32G4 Flash Driver

Added a flash driver for the STM32G4 series. The primary change here is the addition of stm32g4xxx_flash.c. This file uses the STM32L4 flash driver as a template. The primary difference is the accounting for dual banks with different page sizes. Fixed error while building b-g474e-dpow1/buckboost. It was possible (technically) to have page be used uninitialzied. Changing the if statement to default to using a flash_page_size == 2048 fixes this issue.
kywwilson11 · Oct 15, 2024 · df47241 · df47241
1 parent 5592145
commit df47241
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Showing 5 changed files with 697 additions and 20 deletions.
diff --git a/arch/arm/src/stm32/hardware/stm32_flash.h b/arch/arm/src/stm32/hardware/stm32_flash.h
@@ -178,17 +178,37 @@
 /* Define the Valid Configuration the G4 */
 
 #  elif defined(CONFIG_STM32_STM32G4XXX)
-#    if defined(CONFIG_STM32_FLASH_CONFIG_B)
-#      define STM32_FLASH_NPAGES      32
-#      define STM32_FLASH_PAGESIZE    4096
-
-#    elif defined(CONFIG_STM32_FLASH_CONFIG_C)
-#      define STM32_FLASH_NPAGES      64
-#      define STM32_FLASH_PAGESIZE    4096
-
-#    elif defined(CONFIG_STM32_FLASH_CONFIG_E)
-#      define STM32_FLASH_NPAGES      128
-#      define STM32_FLASH_PAGESIZE    4096
+#    if defined(CONFIG_STM32_STM32G43XX)
+#      if defined(CONFIG_STM32_FLASH_CONFIG_6)
+#        define STM32_FLASH_NPAGES      16
+#        define STM32_FLASH_PAGESIZE    2048
+
+#      elif defined(CONFIG_STM32_FLASH_CONFIG_8)
+#        define STM32_FLASH_NPAGES      32
+#        define STM32_FLASH_PAGESIZE    2048
+
+#      elif defined(CONFIG_STM32_FLASH_CONFIG_B)
+#        define STM32_FLASH_NPAGES      64
+#        define STM32_FLASH_PAGESIZE    2048
+#      endif
+#    elif defined(CONFIG_STM32_STM32G47XX) || defined(CONFIG_STM32_STM32G48XX)
+#      if defined(CONFIG_STM32_FLASH_CONFIG_B)
+#        define STM32_FLASH_SIZE        32 * 4096
+
+#      elif defined(CONFIG_STM32_FLASH_CONFIG_C)
+#        define STM32_FLASH_SIZE        64 * 4096
+
+#      elif defined(CONFIG_STM32_FLASH_CONFIG_E)
+#        define STM32_FLASH_SIZE        128 * 4096
+#      endif
+#    elif defined(CONFIG_STM32_STM32G49XX) 
+#      elif defined(CONFIG_STM32_FLASH_CONFIG_C)
+#        define STM32_FLASH_NPAGES      128
+#        define STM32_FLASH_PAGESIZE    2048
+
+#      elif defined(CONFIG_STM32_FLASH_CONFIG_E)
+#        define STM32_FLASH_NPAGES      256
+#        define STM32_FLASH_PAGESIZE    2048
 #    endif
 
 /* Define the Valid Configuration the F1 and F3  */
@@ -261,7 +281,7 @@
 #elif defined(CONFIG_STM32_STM32G4XXX)
 #  define STM32_FLASH_PDKEYR_OFFSET    0x0004
 #  define STM32_FLASH_KEYR_OFFSET      0x0008
-#  define STM32_FLASH_OPT_KEYR_OFFSET  0x000c
+#  define STM32_FLASH_OPTKEYR_OFFSET   0x000c
 #  define STM32_FLASH_SR_OFFSET        0x0010
 #  define STM32_FLASH_CR_OFFSET        0x0014
 #  define STM32_FLASH_ECCR_OFFSET      0x0018
@@ -324,7 +344,7 @@
 #elif defined(CONFIG_STM32_STM32G4XXX)
 #  define STM32_FLASH_PDKEYR         (STM32_FLASHIF_BASE+STM32_FLASH_PDKEYR_OFFSET)
 #  define STM32_FLASH_KEYR           (STM32_FLASHIF_BASE+STM32_FLASH_KEYR_OFFSET)
-#  define STM32_FLASH_OPT_KEYR       (STM32_FLASHIF_BASE+STM32_FLASH_OPT_KEYR_OFFSET)
+#  define STM32_FLASH_OPTKEYR        (STM32_FLASHIF_BASE+STM32_FLASH_OPTKEYR_OFFSET)
 #  define STM32_FLASH_SR             (STM32_FLASHIF_BASE+STM32_FLASH_SR_OFFSET)
 #  define STM32_FLASH_CR             (STM32_FLASHIF_BASE+STM32_FLASH_CR_OFFSET)
 #  define STM32_FLASH_ECCR           (STM32_FLASHIF_BASE+STM32_FLASH_ECCR_OFFSET)
@@ -538,10 +558,18 @@
 #  define FLASH_CR_PER              (1 << 1)
 #  define FLASH_CR_MER1             (1 << 2)
 #  define FLASH_CR_PNB_SHIFT        (3)
-#  define FLASH_CR_PNB_MASK         (0x7f << FLASH_CR_PNB_SHIFT)
+#  if defined(CONFIG_STM32_STM32G43XX)
+#    define FLASH_CR_PNB_MASK         (0x3f << FLASH_CR_PNB_SHIFT)
+#  elif defined(CONFIG_STM32_STM32G47XX) || defined (CONFIG_STM32_STM32G48XX)
+#    define FLASH_CR_PNB_MASK         (0x7f << FLASH_CR_PNB_SHIFT)
+#  elif defined(CONFIG_STM32_STM32G49XX)
+#    define FLASH_CR_PNB_MASK         (0xff << FLASH_CR_PNB_SHIFT)
+#  endif
 #    define FLASH_CR_PNB(n)         (((n) << FLASH_CR_PNB_SHIFT) & FLASH_CR_PNB_MASK)
-#  define FLASH_CR_BKER             (1 << 11)
-#  define FLASH_CR_MER2             (1 << 15)
+#  if defined(CONFIG_STM32_STM32G47XX) || defined (CONFIG_STM32_STM32G48XX)
+#    define FLASH_CR_BKER             (1 << 11)
+#    define FLASH_CR_MER2             (1 << 15)
+#  endif
 #  define FLASH_CR_START            (1 << 16)
 #  define FLASH_CR_OPTSTRT          (1 << 17)
 #  define FLASH_CR_FSTPG            (1 << 18)
@@ -550,7 +578,9 @@
 #  define FLASH_CR_RDERRIE          (1 << 26)
 #  define FLASH_CR_OBL_LAUNCH       (1 << 27)
 #  define FLASH_CR_SEC_PROT1        (1 << 28)
-#  define FLASH_CR_SEC_PROT2        (1 << 29)
+#  if defined(CONFIG_STM32_STM32G47XX) || defined (CONFIG_STM32_STM32G48XX)
+#    define FLASH_CR_SEC_PROT2        (1 << 29)
+#  endif
 #  define FLASH_CR_OPTLOCK          (1 << 30)
 #  define FLASH_CR_LOCK             (1 << 31)
 #endif
@@ -568,8 +598,10 @@
 #  define FLASH_ECCR_BK_ECC            (1 << 21)
 #  define FLASH_ECCR_SYSF_ECC          (1 << 22)
 #  define FLASH_ECCR_ECCIE             (1 << 24)
-#  define FLASH_ECCR_ECCC2             (1 << 28)
-#  define FLASH_ECCR_ECCD2             (1 << 29)
+#  if defined(CONFIG_STM32_STM32G47XX) || defined (CONFIG_STM32_STM32G48XX)
+#    define FLASH_ECCR_ECCC2             (1 << 28)
+#    define FLASH_ECCR_ECCD2             (1 << 29)
+#  endif
 #  define FLASH_ECCR_ECCC              (1 << 30)
 #  define FLASH_ECCR_ECCD              (1 << 31)
 #endif
@@ -633,7 +665,11 @@
 #  define FLASH_OPTR_IWDG_STDBY        (1 << 18)
 #  define FLASH_OPTR_WWDG_SW           (1 << 19)
 #  define FLASH_OPTR_BFB2              (1 << 20)
-#  define FLASH_OPTR_DBANK             (1 << 22)
+#  if defined(CONFIG_STM32_STM32G47XX) || defined (CONFIG_STM32_STM32G48XX)
+#    define FLASH_OPTR_DBANK           (1 << 22)
+#  elif defined (CONFIG_STM32_STM32G49XX)
+#    define FLASH_OPTR_PB4_PUPEN       (1 << 22)
+#  endif
 #  define FLASH_OPTR_NBOOT1            (1 << 23)
 #  define FLASH_OPTR_SRAM_PE           (1 << 24)
 #  define FLASH_OPTR_CCMSRAM_RST       (1 << 25)

diff --git a/arch/arm/src/stm32/stm32_flash.c b/arch/arm/src/stm32/stm32_flash.c
@@ -36,6 +36,8 @@
 #  include "stm32f10xxf30xx_flash.c"
 #elif defined(CONFIG_STM32_STM32F20XX) || defined (CONFIG_STM32_STM32F4XXX)
 #  include "stm32f20xxf40xx_flash.c"
+#elif defined(CONFIG_STM32_STM32G4XXX)
+#  include "stm32g4xxx_flash.c"
 #else
 #  warning "No FLASH support for the selected part"
 #endif

diff --git a/arch/arm/src/stm32/stm32_flash.h b/arch/arm/src/stm32/stm32_flash.h
@@ -35,6 +35,28 @@
  * Public Function Prototypes
  ****************************************************************************/
 
+int stm32_flash_lock(void);
+int stm32_flash_unlock(void);
+
+/****************************************************************************
+ * Name: stm32_flash_user_optbytes
+ *
+ * Description:
+ *   Modify the contents of the user option bytes (USR OPT) on the flash.
+ *   This does not set OBL_LAUNCH so new options take effect only after
+ *   next power reset.
+ *
+ * Input Parameters:
+ *   clrbits - Bits in the option bytes to be cleared
+ *   setbits - Bits in the option bytes to be set
+ *
+ * Returned Value:
+ *   Option bytes after operation is completed
+ *
+ ****************************************************************************/
+
+uint32_t stm32_flash_users_optbytes(uint32_t clrbits, uint32_t setbits);
+
 /****************************************************************************
  * Name: stm32_eeprom_size
  *