Make MacroAssembler::merge more clear

src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp

@@ -2350,25 +2350,30 @@ void MacroAssembler::membar(Membar_mask_bits order_constraint) {
   address last = code()->last_insn();
   if (last != nullptr && nativeInstruction_at(last)->is_Membar() && prev == last) {
     NativeMembar *bar = NativeMembar_at(prev);
+    if (AlwaysMergeDMB) {
+      bar->set_kind(bar->get_kind() | order_constraint);
+      BLOCK_COMMENT("merged membar(always)");
+      return;
+    }
     // Don't promote DMB ST|DMB LD to DMB (a full barrier) because
     // doing so would introduce a StoreLoad which the caller did not
     // intend
-    if (AlwaysMergeDMB || bar->get_kind() == order_constraint
+    if (bar->get_kind() == order_constraint
         || bar->get_kind() == AnyAny
         || order_constraint == AnyAny) {
       // We are merging two memory barrier instructions.  On AArch64 we
       // can do this simply by ORing them together.
       bar->set_kind(bar->get_kind() | order_constraint);
       BLOCK_COMMENT("merged membar");
       return;
-    } else if (!AlwaysMergeDMB){
+    } else {
       // A special case like "DMB ST;DMB LD;DMB ST", the last DMB can be skipped
       // We need check the last 2 instructions
       address prev2 = prev - NativeMembar::instruction_size;
       if (last != code()->last_label() && nativeInstruction_at(prev2)->is_Membar()) {
         NativeMembar *bar2 = NativeMembar_at(prev2);
         assert(bar2->get_kind() == order_constraint, "it should be merged before");
-        BLOCK_COMMENT("merged membar");
+        BLOCK_COMMENT("merged membar(elided)");
         return;
       }
     }