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ARC: Entry Handler tweaks: Avoid hardcoded LIMMS for ECR values
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Signed-off-by: Vineet Gupta <[email protected]>
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vineetgarc committed Jun 22, 2013
1 parent 3ebedbb commit 1898a95
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Showing 2 changed files with 14 additions and 6 deletions.
5 changes: 5 additions & 0 deletions arch/arc/include/asm/arcregs.h
Original file line number Diff line number Diff line change
Expand Up @@ -68,6 +68,11 @@
#define ECR_C_PROTV_XCHG 0x03
#define ECR_C_PROTV_MISALIG_DATA 0x04

#define ECR_C_BIT_PROTV_MISALIG_DATA 10

/* Machine Check Cause Code Values */
#define ECR_C_MCHK_DUP_TLB 0x01

/* DTLB Miss Exception Cause Code Values */
#define ECR_C_BIT_DTLB_LD_MISS 8
#define ECR_C_BIT_DTLB_ST_MISS 9
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15 changes: 9 additions & 6 deletions arch/arc/kernel/entry.S
Original file line number Diff line number Diff line change
Expand Up @@ -321,7 +321,10 @@ ARC_ENTRY EV_MachineCheck
lr r1, [efa]
mov r2, sp

brne r0, 0x200100, 1f
lsr r3, r0, 8
bmsk r3, r3, 7
brne r3, ECR_C_MCHK_DUP_TLB, 1f

bl do_tlb_overlap_fault
b ret_from_exception

Expand Down Expand Up @@ -368,11 +371,11 @@ ARC_ENTRY EV_TLBProtV
;------ (5) Type of Protection Violation? ----------
;
; ProtV Hardware Exception is triggered for Access Faults of 2 types
; -Access Violaton (WRITE to READ ONLY Page) - for linux COW
; -Unaligned Access (READ/WRITE on odd boundary)
; -Access Violaton : 00_23_(00|01|02|03)_00
; x r w r+w
; -Unaligned Access : 00_23_04_00
;
cmp r2, 0x230400 ; Misaligned data access ?
beq 4f
bbit1 r2, ECR_C_BIT_PROTV_MISALIG_DATA, 4f

;========= (6a) Access Violation Processing ========
mov r0, sp ; pt_regs
Expand Down Expand Up @@ -542,7 +545,7 @@ ARC_ENTRY EV_Trap

;------- (4) What caused the Trap --------------
lr r12, [ecr]
and.f 0, r12, ECR_PARAM_MASK
bmsk.f 0, r12, 7
bnz trap_with_param

; ======= (5a) Trap is due to System Call ========
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