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[llvm][CodeGen] Fixed max cycle calculation with zero-cost instructio…
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…ns for window scheduler (llvm#99454)

We discovered some scheduling failures occurring when zero-cost
instructions were involved. This issue will be addressed by this patch.
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kaiyan96 authored and tru committed Aug 20, 2024
1 parent e02d8b2 commit cb1d933
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Showing 2 changed files with 55 additions and 6 deletions.
16 changes: 10 additions & 6 deletions llvm/lib/CodeGen/WindowScheduler.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -440,12 +440,16 @@ int WindowScheduler::calculateMaxCycle(ScheduleDAGInstrs &DAG,
int PredCycle = getOriCycle(PredMI);
ExpectCycle = std::max(ExpectCycle, PredCycle + (int)Pred.getLatency());
}
// ResourceManager can be used to detect resource conflicts between the
// current MI and the previously inserted MIs.
while (!RM.canReserveResources(*SU, CurCycle) || CurCycle < ExpectCycle) {
++CurCycle;
if (CurCycle == (int)WindowIILimit)
return CurCycle;
// Zero cost instructions do not need to check resource.
if (!TII->isZeroCost(MI.getOpcode())) {
// ResourceManager can be used to detect resource conflicts between the
// current MI and the previously inserted MIs.
while (!RM.canReserveResources(*SU, CurCycle) || CurCycle < ExpectCycle) {
++CurCycle;
if (CurCycle == (int)WindowIILimit)
return CurCycle;
}
RM.reserveResources(*SU, CurCycle);
}
RM.reserveResources(*SU, CurCycle);
OriToCycle[getOriMI(&MI)] = CurCycle;
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45 changes: 45 additions & 0 deletions llvm/test/CodeGen/Hexagon/swp-ws-zero-cost.mir
Original file line number Diff line number Diff line change
@@ -0,0 +1,45 @@
# REQUIRES: asserts
# RUN: llc --march=hexagon %s -run-pass=pipeliner -debug-only=pipeliner \
# RUN: -window-sched=force -filetype=null -verify-machineinstrs 2>&1 \
# RUN: | FileCheck %s

# CHECK-NOT: Can't find a valid II. Keep searching...
# CHECK: Start analyzing II
# CHECK: Start scheduling Phis
# CHECK: Current window Offset is {{[0-9]+}} and II is {{[0-9]+}}

---
name: relu
tracksRegLiveness: true
body: |
bb.0:
successors: %bb.2(0x30000000), %bb.1(0x50000000)
liveins: $r0, $r1, $r2
%0:intregs = COPY $r2
%1:intregs = COPY $r1
%2:intregs = COPY $r0
%3:predregs = C2_cmpeqi %2, 0
J2_jumpt killed %3, %bb.2, implicit-def dead $pc
J2_jump %bb.1, implicit-def dead $pc
bb.1:
successors: %bb.3(0x80000000)
%4:hvxvr = V6_vd0
%5:intregs = A2_addi %2, 31
%6:intregs = S2_lsr_i_r %5, 5
%7:intregs = COPY %6
J2_loop0r %bb.3, %7, implicit-def $lc0, implicit-def $sa0, implicit-def $usr
J2_jump %bb.3, implicit-def dead $pc
bb.2:
PS_jmpret $r31, implicit-def dead $pc
bb.3 (machine-block-address-taken):
successors: %bb.3(0x7c000000), %bb.2(0x04000000)
%8:intregs = PHI %1, %bb.1, %9, %bb.3
%10:intregs = PHI %0, %bb.1, %14, %bb.3
%11:hvxvr, %9:intregs = V6_vL32b_pi %8, 128
%12:intregs = COPY %10
%13:hvxvr = V6_vmaxw killed %11, %4
%14:intregs = V6_vS32b_pi %12, 128, killed %13
ENDLOOP0 %bb.3, implicit-def $pc, implicit-def $lc0, implicit $sa0, implicit $lc0
J2_jump %bb.2, implicit-def dead $pc
...

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