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qreg_creg_descending calls deprecated Bit.index (Qiskit#10843)
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* reversing instead of sorting by index in reverse

* QCircuitImage calls deprecated Bit.index

* revert

* Simplifying approach

---

Co-authored-by: Jake Lishman <[email protected]>

---------

Co-authored-by: Jake Lishman <[email protected]>
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1ucian0 and jakelishman authored Sep 15, 2023
1 parent 05e24d5 commit 7d9d32e
Showing 1 changed file with 6 additions and 36 deletions.
42 changes: 6 additions & 36 deletions qiskit/visualization/timeline/layouts.py
Original file line number Diff line number Diff line change
Expand Up @@ -48,14 +48,10 @@ def my_layout(time_window: Tuple[int, int]) -> types.HorizontalAxis:
Arbitrary layout function satisfying the above format can be accepted.
"""

import warnings

from typing import List, Tuple
import numpy as np

from qiskit import circuit
from qiskit.visualization.exceptions import VisualizationError
from qiskit.visualization.timeline import types


Expand All @@ -70,23 +66,9 @@ def qreg_creg_ascending(bits: List[types.Bits]) -> List[types.Bits]:
Returns:
Sorted bits.
"""
qregs = []
cregs = []

for bit in bits:
if isinstance(bit, circuit.Qubit):
qregs.append(bit)
elif isinstance(bit, circuit.Clbit):
cregs.append(bit)
else:
raise VisualizationError(f"Unknown bit {bit} is provided.")

with warnings.catch_warnings():
warnings.simplefilter("ignore")
qregs = sorted(qregs, key=lambda x: x.index, reverse=False)
cregs = sorted(cregs, key=lambda x: x.index, reverse=False)

return qregs + cregs
return [x for x in bits if isinstance(x, circuit.Qubit)] + [
x for x in bits if isinstance(x, circuit.Clbit)
]


def qreg_creg_descending(bits: List[types.Bits]) -> List[types.Bits]:
Expand All @@ -100,21 +82,9 @@ def qreg_creg_descending(bits: List[types.Bits]) -> List[types.Bits]:
Returns:
Sorted bits.
"""
qregs = []
cregs = []

for bit in bits:
if isinstance(bit, circuit.Qubit):
qregs.append(bit)
elif isinstance(bit, circuit.Clbit):
cregs.append(bit)
else:
raise VisualizationError(f"Unknown bit {bit} is provided.")

qregs = sorted(qregs, key=lambda x: x.index, reverse=True)
cregs = sorted(cregs, key=lambda x: x.index, reverse=True)

return qregs + cregs
return [x for x in bits[::-1] if isinstance(x, circuit.Qubit)] + [
x for x in bits[::-1] if isinstance(x, circuit.Clbit)
]


def time_map_in_dt(time_window: Tuple[int, int]) -> types.HorizontalAxis:
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