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ivanizag committed Jul 31, 2024
1 parent 9c7198f commit 70295bd
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Showing 24 changed files with 157 additions and 161 deletions.
2 changes: 1 addition & 1 deletion src/bin/cpuville.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
http://cpuville.com/Code/CPM-on-a-new-computer.html
http://cpuville.com/Code/Tiny-BASIC.html
*/
use std::io::*;
use std::io::{BufRead, Read, Write, stdin, stdout};
use std::sync::mpsc;
use std::sync::mpsc::Receiver;
use std::sync::mpsc::TryRecvError;
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2 changes: 1 addition & 1 deletion src/bin/simplest.rs
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
use iz80::*;
use iz80::{Cpu, Machine, PlainMachine};

fn main() {
// Prepare the device
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2 changes: 1 addition & 1 deletion src/bin/simplest8080.rs
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
use iz80::*;
use iz80::{Cpu, Machine, PlainMachine};

fn main() {
// Prepare the device
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24 changes: 12 additions & 12 deletions src/cpu.rs
Original file line number Diff line number Diff line change
@@ -1,10 +1,10 @@
use super::decoder_z80::*;
use super::decoder_8080::*;
use super::environment::*;
use super::machine::*;
use super::opcode::*;
use super::registers::*;
use super::state::*;
use super::decoder_z80::DecoderZ80;
use super::decoder_8080::Decoder8080;
use super::environment::Environment;
use super::machine::Machine;
use super::opcode::Opcode;
use super::registers::{Reg16, Reg8, Registers};
use super::state::State;

const IRQ_ADDRESS: u16 = 0x0036;
const NMI_ADDRESS: u16 = 0x0066;
Expand All @@ -24,7 +24,7 @@ pub(crate) trait Decoder {

impl Cpu {

/// Returns a Z80 Cpu instance. Alias of new_z80()
/// Returns a Z80 Cpu instance. Alias of `new_z80()`
pub fn new() -> Cpu {
Self::new_z80()
}
Expand Down Expand Up @@ -173,19 +173,19 @@ impl Cpu {
}

/// Maskable interrupt request. It stays signaled until is is
/// deactivated by calling signal_interrupt(false).
/// deactivated by calling `signal_interrupt(false)`.
pub fn signal_interrupt(&mut self, active: bool) {
self.state.int_signaled = active
self.state.int_signaled = active;
}

/// Non maskable interrupt request
pub fn signal_nmi(&mut self) {
self.state.nmi_pending = true
self.state.nmi_pending = true;
}

/// Signal reset
pub fn signal_reset(&mut self) {
self.state.reset_pending = true
self.state.reset_pending = true;
}

/// Returns the current cycle count
Expand Down
4 changes: 2 additions & 2 deletions src/decoder_z80.rs
Original file line number Diff line number Diff line change
Expand Up @@ -33,11 +33,11 @@ impl Decoder for DecoderZ80 {
if code == 0xdd {
// DD prefix
env.set_index(Reg16::IX);
code = env.advance_pc()
code = env.advance_pc();
} else {
// FD prefix
env.set_index(Reg16::IY);
code = env.advance_pc()
code = env.advance_pc();
}
}

Expand Down
4 changes: 2 additions & 2 deletions src/environment.rs
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
use super::machine::*;
use super::machine::Machine;
use super::opcode::Opcode;
use super::registers::*;
use super::registers::{Reg16, Reg8};
use super::state::State;

pub struct Environment<'a> {
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4 changes: 2 additions & 2 deletions src/machine.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@
///
/// The device hosting the CPU has to provide implementations
/// of the memory and port access. A simple implementation is
/// provided with PlainMachine
/// provided with `PlainMachine`
pub trait Machine {
/// Returns the memory contents in [address]
fn peek(&self, address: u16) -> u8;
Expand Down Expand Up @@ -40,7 +40,7 @@ pub struct PlainMachine {
}

impl PlainMachine {
/// Returns a new PlainMachine instance
/// Returns a new `PlainMachine` instance
pub fn new() -> PlainMachine {
PlainMachine {
mem: [0; 65536],
Expand Down
10 changes: 5 additions & 5 deletions src/opcode.rs
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
use super::environment::*;
use super::registers::*;
use super::environment::Environment;
use super::registers::Reg16;

type OpcodeFn = dyn Fn(&mut Environment);

Expand Down Expand Up @@ -35,18 +35,18 @@ impl Opcode {
if self.name.contains("nn") {
// Immediate argument 16 bits
let nn = env.peek16_pc();
let nn_str = format!("{:04x}h", nn);
let nn_str = format!("{nn:04x}h");
name.replace("nn", &nn_str)
} else if self.name.contains('n') {
// Immediate argument 8 bits
let n = env.peek_pc();
let n_str = format!("{:02x}h", n);
let n_str = format!("{n:02x}h");
name.replace('n', &n_str)
} else if self.name.contains('d') {
// Immediate argument 8 bits signed
// In assembly it's shown with 2 added as if it were from the opcode pc.
let d = env.peek_pc() as i8 as i16 + 2;
let d_str = format!("{:+x}", d);
let d_str = format!("{d:+x}");
name.replace('d', &d_str)
} else {
name
Expand Down
16 changes: 8 additions & 8 deletions src/opcode_alu.rs
Original file line number Diff line number Diff line change
@@ -1,13 +1,13 @@
use super::opcode::*;
use super::environment::*;
use super::registers::*;
use super::operators::*;
use super::opcode::Opcode;
use super::environment::Environment;
use super::registers::{Flag, Reg16, Reg8};
use super::operators::{Operator, operator_cp};

pub fn build_operator_a_r(r: Reg8, (op, name): (Operator, &str)) -> Opcode {
if r != Reg8::_HL && r != Reg8::H && r != Reg8::L {
// Fast version
Opcode::new(
format!("{} A, {}", name, r),
format!("{name} A, {r}"),
move |env: &mut Environment| {
let a = env.state.reg.a();
let b = env.state.reg.get8(r);
Expand All @@ -17,7 +17,7 @@ pub fn build_operator_a_r(r: Reg8, (op, name): (Operator, &str)) -> Opcode {
)
} else {
Opcode::new(
format!("{} A, {}", name, r),
format!("{name} A, {r}"),
move |env: &mut Environment| {
let a = env.state.reg.a();
let b = env.reg8_ext(r);
Expand All @@ -31,7 +31,7 @@ pub fn build_operator_a_r(r: Reg8, (op, name): (Operator, &str)) -> Opcode {

pub fn build_operator_a_n((op, name): (Operator, &str)) -> Opcode {
Opcode::new(
format!("{} A, n", name),
format!("{name} A, n"),
move |env: &mut Environment| {
let a = env.state.reg.a();
let b = env.advance_pc();
Expand All @@ -44,7 +44,7 @@ pub fn build_operator_a_n((op, name): (Operator, &str)) -> Opcode {

pub fn build_cp_block((inc, repeat, postfix) : (bool, bool, &'static str)) -> Opcode {
Opcode::new(
format!("CP{}", postfix),
format!("CP{postfix}"),
move |env: &mut Environment| {
let a = env.state.reg.a();
let b = env.reg8_ext(Reg8::_HL);
Expand Down
18 changes: 9 additions & 9 deletions src/opcode_arith.rs
Original file line number Diff line number Diff line change
@@ -1,12 +1,12 @@
use super::opcode::*;
use super::environment::*;
use super::opcode::Opcode;
use super::environment::Environment;
use super::operators::*;
use super::registers::*;
use super::registers::{Flag, Reg16, Reg8};

// 16 bit ADD opcodes
pub fn build_add_hl_rr(rr: Reg16) -> Opcode {
Opcode::new(
format!("ADD HL, {:?}", rr),
format!("ADD HL, {rr:?}"),
move |env: &mut Environment| {
let aa = env.index_value();
let bb = env.reg16_ext(rr);
Expand All @@ -18,7 +18,7 @@ pub fn build_add_hl_rr(rr: Reg16) -> Opcode {

pub fn build_adc_hl_rr(rr: Reg16) -> Opcode {
Opcode::new(
format!("ADC HL, {:?}", rr),
format!("ADC HL, {rr:?}"),
move |env: &mut Environment| {
let aa = env.index_value(); // This will always be HL.
let bb = env.reg16_ext(rr);
Expand All @@ -30,7 +30,7 @@ pub fn build_adc_hl_rr(rr: Reg16) -> Opcode {

pub fn build_sbc_hl_rr(rr: Reg16) -> Opcode {
Opcode::new(
format!("SBC HL, {:?}", rr),
format!("SBC HL, {rr:?}"),
move |env: &mut Environment| {
let aa = env.index_value(); // This will always be HL.
let bb = env.reg16_ext(rr);
Expand All @@ -44,7 +44,7 @@ pub fn build_sbc_hl_rr(rr: Reg16) -> Opcode {
// INC, DEC opcodes
pub fn build_inc_r(r: Reg8) -> Opcode {
Opcode::new(
format!("INC {}", r),
format!("INC {r}"),
move |env: &mut Environment| {
let a = env.reg8_ext(r);
let v = operator_inc(env, a);
Expand All @@ -55,7 +55,7 @@ pub fn build_inc_r(r: Reg8) -> Opcode {

pub fn build_dec_r(r: Reg8) -> Opcode {
Opcode::new(
format!("DEC {}", r),
format!("DEC {r}"),
move |env: &mut Environment| {
let a = env.reg8_ext(r);
let v = operator_dec(env, a);
Expand All @@ -68,7 +68,7 @@ pub fn build_inc_dec_rr(rr: Reg16, inc: bool) -> Opcode {
let delta = if inc {1} else {-1_i16 as u16};
let mnemonic = if inc {"INC"} else {"DEC"};
Opcode::new(
format!("{} {:?}", mnemonic, rr),
format!("{mnemonic} {rr:?}"),
move |env: &mut Environment| {
let mut v = env.reg16_ext(rr);
v = v.wrapping_add(delta);
Expand Down
14 changes: 7 additions & 7 deletions src/opcode_bits.rs
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
use super::opcode::*;
use super::environment::*;
use super::registers::*;
use super::opcode::Opcode;
use super::environment::Environment;
use super::registers::{Flag, Reg8};

#[derive(Copy, Clone)]
pub enum ShiftMode {
Expand All @@ -18,10 +18,10 @@ pub enum ShiftDir {

pub fn build_rot_r(r: Reg8, (dir, mode, name): (ShiftDir, ShiftMode, &str), fast: bool, indexed: bool) -> Opcode {
let full_name = if indexed {
format!("LD {}, {} {}", r, name, Reg8::_HL)
format!("LD {r}, {name} {}", Reg8::_HL)
} else {
let separator = if fast {""} else {" "};
format!("{}{}{}", name, separator, r)
format!("{name}{separator}{r}")
};

Opcode::new(
Expand Down Expand Up @@ -82,7 +82,7 @@ pub fn build_rot_r(r: Reg8, (dir, mode, name): (ShiftDir, ShiftMode, &str), fast

pub fn build_bit_r(n: u8, r: Reg8) -> Opcode {
Opcode::new(
format!("BIT {}, {}", n, r),
format!("BIT {n}, {r}"),
move |env: &mut Environment| {
let v = env.reg8_ext(r);
let z = v & (1<<n);
Expand Down Expand Up @@ -120,7 +120,7 @@ pub fn build_bit_r(n: u8, r: Reg8) -> Opcode {
pub fn build_set_res_r(bit: u8, r: Reg8, value: bool) -> Opcode {
let name = if value {"SET"} else {"RES"};
Opcode::new(
format!("{} {}, {}", name, bit, r),
format!("{name} {bit}, {r}"),
move |env: &mut Environment| {
let mut v = env.reg8_ext(r);
if value {
Expand Down
14 changes: 7 additions & 7 deletions src/opcode_io.rs
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
use super::opcode::*;
use super::environment::*;
use super::registers::*;
use super::opcode::Opcode;
use super::environment::Environment;
use super::registers::{Reg16, Reg8};

/*
From "The undocumented Z80 documented" TUZD-4.4:
Expand All @@ -17,7 +17,7 @@ instructions before.

pub fn build_out_c_r(r: Reg8) -> Opcode {
Opcode::new(
format!("OUT (C), {}", r),
format!("OUT (C), {r}"),
move |env: &mut Environment| {
let address = env.state.reg.get16(Reg16::BC);
let value = env.state.reg.get8(r);
Expand Down Expand Up @@ -49,7 +49,7 @@ pub fn build_out_n_a() -> Opcode {

pub fn build_in_r_c(r: Reg8) -> Opcode {
Opcode::new(
format!("IN {}, (C)", r),
format!("IN {r}, (C)"),
move |env: &mut Environment| {
let address = env.state.reg.get16(Reg16::BC);
let value = env.port_in(address);
Expand Down Expand Up @@ -91,7 +91,7 @@ instructions before.

pub fn build_in_block((inc, repeat, postfix) : (bool, bool, &'static str)) -> Opcode {
Opcode::new(
format!("IN{}", postfix),
format!("IN{postfix}"),
move |env: &mut Environment| {
// The INI/INIR/IND/INDR instructions use BC after decrementing B
let b = env.state.reg.inc_dec8(Reg8::B, false /* decrement */);
Expand Down Expand Up @@ -120,7 +120,7 @@ pub fn build_in_block((inc, repeat, postfix) : (bool, bool, &'static str)) -> Op
pub fn build_out_block((inc, repeat, postfix) : (bool, bool, &'static str)) -> Opcode {
let n0 = if repeat {"OT"} else {"OUT"};
Opcode::new(
format!("{}{}", n0, postfix),
format!("{n0}{postfix}"),
move |env: &mut Environment| {
// the OUTI/OTIR/OUTD/OTDR instructions use BC before decrementing B
let address = env.state.reg.get16(Reg16::BC);
Expand Down
16 changes: 8 additions & 8 deletions src/opcode_jumps.rs
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
use super::opcode::*;
use super::environment::*;
use super::registers::*;
use super::opcode::Opcode;
use super::environment::Environment;
use super::registers::{Flag, Reg8};

// Relative jumps
pub fn build_djnz() -> Opcode {
Expand Down Expand Up @@ -31,7 +31,7 @@ pub fn build_jr_unconditional() -> Opcode {

pub fn build_jr_eq((flag, value, name): (Flag, bool, &str)) -> Opcode {
Opcode::new(
format!("JR {}, d", name),
format!("JR {name}, d"),
move |env: &mut Environment| {
let offset = env.advance_pc();
if env.state.reg.get_flag(flag) == value {
Expand Down Expand Up @@ -62,7 +62,7 @@ pub fn build_jp_unconditional() -> Opcode {

pub fn build_jp_eq((flag, value, name): (Flag, bool, &str)) -> Opcode {
Opcode::new(
format!("JP {}, nn", name),
format!("JP {name}, nn"),
move |env: &mut Environment| {
let address = env.advance_immediate16();
if env.state.reg.get_flag(flag) == value {
Expand Down Expand Up @@ -97,7 +97,7 @@ pub fn build_call() -> Opcode {

pub fn build_call_eq((flag, value, name): (Flag, bool, &str)) -> Opcode {
Opcode::new(
format!("CALL {}, nn", name),
format!("CALL {name}, nn"),
move |env: &mut Environment| {
let address = env.advance_immediate16();
if env.state.reg.get_flag(flag) == value {
Expand All @@ -110,7 +110,7 @@ pub fn build_call_eq((flag, value, name): (Flag, bool, &str)) -> Opcode {

pub fn build_rst(d: u8) -> Opcode {
Opcode::new(
format!("RST {:02x}h", d),
format!("RST {d:02x}h"),
move |env: &mut Environment| {
let address = d as u16;
env.subroutine_call(address);
Expand Down Expand Up @@ -150,7 +150,7 @@ pub fn build_retn() -> Opcode {

pub fn build_ret_eq((flag, value, name): (Flag, bool, &str)) -> Opcode {
Opcode::new(
format!("RET {}", name),
format!("RET {name}"),
move |env: &mut Environment| {
if env.state.reg.get_flag(flag) == value {
env.set_branch_taken();
Expand Down
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