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iree-github-actions-bot committed Aug 5, 2024
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114 changes: 57 additions & 57 deletions community/blog/2024-01-22-exploring-cpu-microkernels-on-a-matmul-example/index.html
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Original file line number Diff line number Diff line change
Expand Up @@ -4214,22 +4214,22 @@ <h3 id="ir-dump-after-cpulowertoukernels">IR Dump After CPULowerToUKernels<a cla
%c1 = arith.constant 1 : index
%c0 = arith.constant 0 : index
%c32_i64 = arith.constant 32 : i64
%0 = hal.interface.constant.load[0] : i32
%1 = hal.interface.constant.load[1] : i32
%2 = hal.interface.constant.load[2] : i32
%3 = hal.interface.constant.load[3] : i32
%4 = hal.interface.constant.load[4] : i32
%5 = hal.interface.constant.load[5] : i32
%6 = hal.interface.constant.load[6] : i32
%7 = hal.interface.constant.load[7] : i32
%8 = hal.interface.constant.load[8] : i32
%9 = hal.interface.constant.load[9] : i32
%10 = hal.interface.constant.load[10] : i32
%11 = hal.interface.constant.load[11] : i32
%12 = hal.interface.constant.load[12] : i32
%13 = hal.interface.constant.load[13] : i32
%14 = hal.interface.constant.load[14] : i32
%15 = hal.interface.constant.load[15] : i32
%0 = hal.interface.constant.load layout(#pipeline_layout) ordinal(0) : i32
%1 = hal.interface.constant.load layout(#pipeline_layout) ordinal(1) : i32
%2 = hal.interface.constant.load layout(#pipeline_layout) ordinal(2) : i32
%3 = hal.interface.constant.load layout(#pipeline_layout) ordinal(3) : i32
%4 = hal.interface.constant.load layout(#pipeline_layout) ordinal(4) : i32
%5 = hal.interface.constant.load layout(#pipeline_layout) ordinal(5) : i32
%6 = hal.interface.constant.load layout(#pipeline_layout) ordinal(6) : i32
%7 = hal.interface.constant.load layout(#pipeline_layout) ordinal(7) : i32
%8 = hal.interface.constant.load layout(#pipeline_layout) ordinal(8) : i32
%9 = hal.interface.constant.load layout(#pipeline_layout) ordinal(9) : i32
%10 = hal.interface.constant.load layout(#pipeline_layout) ordinal(10) : i32
%11 = hal.interface.constant.load layout(#pipeline_layout) ordinal(11) : i32
%12 = hal.interface.constant.load layout(#pipeline_layout) ordinal(12) : i32
%13 = hal.interface.constant.load layout(#pipeline_layout) ordinal(13) : i32
%14 = hal.interface.constant.load layout(#pipeline_layout) ordinal(14) : i32
%15 = hal.interface.constant.load layout(#pipeline_layout) ordinal(15) : i32
%16 = arith.extui %0 : i32 to i64
%17 = arith.extui %1 : i32 to i64
%18 = arith.shli %17, %c32_i64 : i64
Expand Down Expand Up @@ -4270,9 +4270,9 @@ <h3 id="ir-dump-after-cpulowertoukernels">IR Dump After CPULowerToUKernels<a cla
%53 = arith.shli %52, %c32_i64 : i64
%54 = arith.ori %51, %53 : i64
%55 = arith.index_castui %54 : i64 to index
%56 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor&lt;readonly:tensor&lt;?x?x16x1xf32&gt;&gt;{%30, %35}
%57 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%20) flags(ReadOnly) : !flow.dispatch.tensor&lt;readonly:tensor&lt;?x?x16x1xf32&gt;&gt;{%40, %45}
%58 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%25) : !flow.dispatch.tensor&lt;readwrite:tensor&lt;?x?x16x16xf32&gt;&gt;{%50, %55}
%56 = hal.interface.binding.subspan layout(#layout) set(0) binding(0) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor&lt;readonly:tensor&lt;?x?x16x1xf32&gt;&gt;{%30, %35}
%57 = hal.interface.binding.subspan layout(#layout) set(0) binding(0) alignment(64) offset(%20) flags(ReadOnly) : !flow.dispatch.tensor&lt;readonly:tensor&lt;?x?x16x1xf32&gt;&gt;{%40, %45}
%58 = hal.interface.binding.subspan layout(#layout) set(0) binding(1) alignment(64) offset(%25) : !flow.dispatch.tensor&lt;readwrite:tensor&lt;?x?x16x16xf32&gt;&gt;{%50, %55}
%workgroup_id_x = hal.interface.workgroup.id[0] : index
%workgroup_count_x = hal.interface.workgroup.count[0] : index
%workgroup_id_y = hal.interface.workgroup.id[1] : index
Expand Down Expand Up @@ -4310,22 +4310,22 @@ <h3 id="ir-dump-after-ireecomprehensivebufferize">IR Dump After IREEComprehensiv
%c1 = arith.constant 1 : index
%c0 = arith.constant 0 : index
%c32_i64 = arith.constant 32 : i64
%0 = hal.interface.constant.load[0] : i32
%1 = hal.interface.constant.load[1] : i32
%2 = hal.interface.constant.load[2] : i32
%3 = hal.interface.constant.load[3] : i32
%4 = hal.interface.constant.load[4] : i32
%5 = hal.interface.constant.load[5] : i32
%6 = hal.interface.constant.load[6] : i32
%7 = hal.interface.constant.load[7] : i32
%8 = hal.interface.constant.load[8] : i32
%9 = hal.interface.constant.load[9] : i32
%10 = hal.interface.constant.load[10] : i32
%11 = hal.interface.constant.load[11] : i32
%12 = hal.interface.constant.load[12] : i32
%13 = hal.interface.constant.load[13] : i32
%14 = hal.interface.constant.load[14] : i32
%15 = hal.interface.constant.load[15] : i32
%0 = hal.interface.constant.load layout(#pipeline_layout) ordinal(0) : i32
%1 = hal.interface.constant.load layout(#pipeline_layout) ordinal(1) : i32
%2 = hal.interface.constant.load layout(#pipeline_layout) ordinal(2) : i32
%3 = hal.interface.constant.load layout(#pipeline_layout) ordinal(3) : i32
%4 = hal.interface.constant.load layout(#pipeline_layout) ordinal(4) : i32
%5 = hal.interface.constant.load layout(#pipeline_layout) ordinal(5) : i32
%6 = hal.interface.constant.load layout(#pipeline_layout) ordinal(6) : i32
%7 = hal.interface.constant.load layout(#pipeline_layout) ordinal(7) : i32
%8 = hal.interface.constant.load layout(#pipeline_layout) ordinal(8) : i32
%9 = hal.interface.constant.load layout(#pipeline_layout) ordinal(9) : i32
%10 = hal.interface.constant.load layout(#pipeline_layout) ordinal(10) : i32
%11 = hal.interface.constant.load layout(#pipeline_layout) ordinal(11) : i32
%12 = hal.interface.constant.load layout(#pipeline_layout) ordinal(12) : i32
%13 = hal.interface.constant.load layout(#pipeline_layout) ordinal(13) : i32
%14 = hal.interface.constant.load layout(#pipeline_layout) ordinal(14) : i32
%15 = hal.interface.constant.load layout(#pipeline_layout) ordinal(15) : i32
%16 = arith.extui %0 : i32 to i64
%17 = arith.extui %1 : i32 to i64
%18 = arith.shli %17, %c32_i64 : i64
Expand Down Expand Up @@ -4366,11 +4366,11 @@ <h3 id="ir-dump-after-ireecomprehensivebufferize">IR Dump After IREEComprehensiv
%53 = arith.shli %52, %c32_i64 : i64
%54 = arith.ori %51, %53 : i64
%55 = arith.index_castui %54 : i64 to index
%56 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : memref&lt;?x?x16x1xf32, #hal.descriptor_type&lt;storage_buffer&gt;&gt;{%30, %35}
%56 = hal.interface.binding.subspan layout(#layout) set(0) binding(0) alignment(64) offset(%c0) flags(ReadOnly) : memref&lt;?x?x16x1xf32, #hal.descriptor_type&lt;storage_buffer&gt;&gt;{%30, %35}
memref.assume_alignment %56, 64 : memref&lt;?x?x16x1xf32, #hal.descriptor_type&lt;storage_buffer&gt;&gt;
%57 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%20) flags(ReadOnly) : memref&lt;?x?x16x1xf32, strided&lt;[?, 16, 1, 1], offset: ?&gt;, #hal.descriptor_type&lt;storage_buffer&gt;&gt;{%40, %45}
%57 = hal.interface.binding.subspan layout(#layout) set(0) binding(0) alignment(64) offset(%20) flags(ReadOnly) : memref&lt;?x?x16x1xf32, strided&lt;[?, 16, 1, 1], offset: ?&gt;, #hal.descriptor_type&lt;storage_buffer&gt;&gt;{%40, %45}
memref.assume_alignment %57, 1 : memref&lt;?x?x16x1xf32, strided&lt;[?, 16, 1, 1], offset: ?&gt;, #hal.descriptor_type&lt;storage_buffer&gt;&gt;
%58 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%25) : memref&lt;?x?x16x16xf32, strided&lt;[?, 256, 16, 1], offset: ?&gt;, #hal.descriptor_type&lt;storage_buffer&gt;&gt;{%50, %55}
%58 = hal.interface.binding.subspan layout(#layout) set(0) binding(1) alignment(64) offset(%25) : memref&lt;?x?x16x16xf32, strided&lt;[?, 256, 16, 1], offset: ?&gt;, #hal.descriptor_type&lt;storage_buffer&gt;&gt;{%50, %55}
memref.assume_alignment %58, 1 : memref&lt;?x?x16x16xf32, strided&lt;[?, 256, 16, 1], offset: ?&gt;, #hal.descriptor_type&lt;storage_buffer&gt;&gt;
%workgroup_id_x = hal.interface.workgroup.id[0] : index
%workgroup_count_x = hal.interface.workgroup.count[0] : index
Expand Down Expand Up @@ -4398,22 +4398,22 @@ <h3 id="ir-dump-after-lowerukernelopstocalls">IR Dump After LowerUKernelOpsToCal
%c1 = arith.constant 1 : index
%c0 = arith.constant 0 : index
%c32_i64 = arith.constant 32 : i64
%0 = hal.interface.constant.load[0] : i32
%1 = hal.interface.constant.load[1] : i32
%2 = hal.interface.constant.load[2] : i32
%3 = hal.interface.constant.load[3] : i32
%4 = hal.interface.constant.load[4] : i32
%5 = hal.interface.constant.load[5] : i32
%6 = hal.interface.constant.load[6] : i32
%7 = hal.interface.constant.load[7] : i32
%8 = hal.interface.constant.load[8] : i32
%9 = hal.interface.constant.load[9] : i32
%10 = hal.interface.constant.load[10] : i32
%11 = hal.interface.constant.load[11] : i32
%12 = hal.interface.constant.load[12] : i32
%13 = hal.interface.constant.load[13] : i32
%14 = hal.interface.constant.load[14] : i32
%15 = hal.interface.constant.load[15] : i32
%0 = hal.interface.constant.load layout(#pipeline_layout) ordinal(0) : i32
%1 = hal.interface.constant.load layout(#pipeline_layout) ordinal(1) : i32
%2 = hal.interface.constant.load layout(#pipeline_layout) ordinal(2) : i32
%3 = hal.interface.constant.load layout(#pipeline_layout) ordinal(3) : i32
%4 = hal.interface.constant.load layout(#pipeline_layout) ordinal(4) : i32
%5 = hal.interface.constant.load layout(#pipeline_layout) ordinal(5) : i32
%6 = hal.interface.constant.load layout(#pipeline_layout) ordinal(6) : i32
%7 = hal.interface.constant.load layout(#pipeline_layout) ordinal(7) : i32
%8 = hal.interface.constant.load layout(#pipeline_layout) ordinal(8) : i32
%9 = hal.interface.constant.load layout(#pipeline_layout) ordinal(9) : i32
%10 = hal.interface.constant.load layout(#pipeline_layout) ordinal(10) : i32
%11 = hal.interface.constant.load layout(#pipeline_layout) ordinal(11) : i32
%12 = hal.interface.constant.load layout(#pipeline_layout) ordinal(12) : i32
%13 = hal.interface.constant.load layout(#pipeline_layout) ordinal(13) : i32
%14 = hal.interface.constant.load layout(#pipeline_layout) ordinal(14) : i32
%15 = hal.interface.constant.load layout(#pipeline_layout) ordinal(15) : i32
%16 = arith.extui %0 : i32 to i64
%17 = arith.extui %1 : i32 to i64
%18 = arith.shli %17, %c32_i64 : i64
Expand Down Expand Up @@ -4454,11 +4454,11 @@ <h3 id="ir-dump-after-lowerukernelopstocalls">IR Dump After LowerUKernelOpsToCal
%53 = arith.shli %52, %c32_i64 : i64
%54 = arith.ori %51, %53 : i64
%55 = arith.index_castui %54 : i64 to index
%56 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : memref&lt;?x?x16x1xf32&gt;{%30, %35}
%56 = hal.interface.binding.subspan layout(#layout) set(0) binding(0) alignment(64) offset(%c0) flags(ReadOnly) : memref&lt;?x?x16x1xf32&gt;{%30, %35}
memref.assume_alignment %56, 64 : memref&lt;?x?x16x1xf32&gt;
%57 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%20) flags(ReadOnly) : memref&lt;?x?x16x1xf32, strided&lt;[?, 16, 1, 1], offset: ?&gt;&gt;{%40, %45}
%57 = hal.interface.binding.subspan layout(#layout) set(0) binding(0) alignment(64) offset(%20) flags(ReadOnly) : memref&lt;?x?x16x1xf32, strided&lt;[?, 16, 1, 1], offset: ?&gt;&gt;{%40, %45}
memref.assume_alignment %57, 1 : memref&lt;?x?x16x1xf32, strided&lt;[?, 16, 1, 1], offset: ?&gt;&gt;
%58 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%25) : memref&lt;?x?x16x16xf32, strided&lt;[?, 256, 16, 1], offset: ?&gt;&gt;{%50, %55}
%58 = hal.interface.binding.subspan layout(#layout) set(0) binding(1) alignment(64) offset(%25) : memref&lt;?x?x16x16xf32, strided&lt;[?, 256, 16, 1], offset: ?&gt;&gt;{%50, %55}
memref.assume_alignment %58, 1 : memref&lt;?x?x16x16xf32, strided&lt;[?, 256, 16, 1], offset: ?&gt;&gt;
%workgroup_id_x = hal.interface.workgroup.id[0] : index
%workgroup_count_x = hal.interface.workgroup.count[0] : index
Expand Down
12 changes: 7 additions & 5 deletions reference/mlir-dialects/HAL/index.html
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Original file line number Diff line number Diff line change
Expand Up @@ -10817,9 +10817,9 @@ <h3 id="interface-ops">Interface ops<a class="headerlink" href="#interface-ops"
<h4 id="halinterfacebindingsubspan-halinterfacebindingsubspanop"><code>hal.interface.binding.subspan</code> (HAL::InterfaceBindingSubspanOp)<a class="headerlink" href="#halinterfacebindingsubspan-halinterfacebindingsubspanop" title="Permanent link">link</a></h4>
<p><em>Returns an alias to a subspan of interface binding data</em></p>
<p>Syntax:</p>
<div class="highlight"><pre><span></span><code>operation ::= `hal.interface.binding.subspan` `set` `(` $set `)`
<div class="highlight"><pre><span></span><code>operation ::= `hal.interface.binding.subspan` `layout` `(` $layout `)`
`set` `(` $set `)`
`binding` `(` $binding `)`
`type` `(` custom&lt;DescriptorType&gt;($descriptor_type) `)`
(`alignment` `(` $alignment^ `)`)?
(`offset` `(` $byte_offset^ `)`)?
(`flags` `(` $descriptor_flags^ `)`)?
Expand All @@ -10837,9 +10837,9 @@ <h4 id="halinterfacebindingsubspan-halinterfacebindingsubspanop"><code>hal.inter
<h5 id="attributes_39">Attributes:<a class="headerlink" href="#attributes_39" title="Permanent link">link</a></h5>
<table>
<tr><th>Attribute</th><th>MLIR Type</th><th>Description</th></tr>
<tr><td><code>layout</code></td><td>::mlir::iree_compiler::IREE::HAL::PipelineLayoutAttr</td><td>executable entry point layout specification</td></tr>
<tr><td><code>set</code></td><td>::mlir::IntegerAttr</td><td>index attribute</td></tr>
<tr><td><code>binding</code></td><td>::mlir::IntegerAttr</td><td>index attribute</td></tr>
<tr><td><code>descriptor_type</code></td><td>::mlir::iree_compiler::IREE::HAL::DescriptorTypeAttr</td><td>valid DescriptorType</td></tr>
<tr><td><code>alignment</code></td><td>::mlir::IntegerAttr</td><td>index attribute</td></tr>
<tr><td><code>descriptor_flags</code></td><td>::mlir::iree_compiler::IREE::HAL::DescriptorFlagsAttr</td><td>valid Descriptor flags</td></tr>
</table>
Expand Down Expand Up @@ -10881,7 +10881,8 @@ <h5 id="results_39">Results:<a class="headerlink" href="#results_39" title="Perm
<h4 id="halinterfaceconstantload-halinterfaceconstantloadop"><code>hal.interface.constant.load</code> (HAL::InterfaceConstantLoadOp)<a class="headerlink" href="#halinterfaceconstantload-halinterfaceconstantloadop" title="Permanent link">link</a></h4>
<p><em>Loads a constant value from the interface constant block</em></p>
<p>Syntax:</p>
<div class="highlight"><pre><span></span><code>operation ::= `hal.interface.constant.load` `` `[` $index `]`
<div class="highlight"><pre><span></span><code>operation ::= `hal.interface.constant.load` `layout` `(` $layout `)`
`ordinal` `(` $ordinal `)`
(`alignment` `(` $alignment^ `)`)?
(`values` `(` $values^ `)`)?
attr-dict `:` type($result)
Expand All @@ -10904,7 +10905,8 @@ <h4 id="halinterfaceconstantload-halinterfaceconstantloadop"><code>hal.interface
<h5 id="attributes_40">Attributes:<a class="headerlink" href="#attributes_40" title="Permanent link">link</a></h5>
<table>
<tr><th>Attribute</th><th>MLIR Type</th><th>Description</th></tr>
<tr><td><code>index</code></td><td>::mlir::IntegerAttr</td><td>size_t</td></tr>
<tr><td><code>layout</code></td><td>::mlir::iree_compiler::IREE::HAL::PipelineLayoutAttr</td><td>executable entry point layout specification</td></tr>
<tr><td><code>ordinal</code></td><td>::mlir::IntegerAttr</td><td>size_t</td></tr>
<tr><td><code>alignment</code></td><td>::mlir::IntegerAttr</td><td>index attribute</td></tr>
<tr><td><code>values</code></td><td>::mlir::ArrayAttr</td><td>array attribute</td></tr>
</table>
Expand Down
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